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[RISC-V] Missing defines in GC
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Alexander Soldatov committed Jul 12, 2023
1 parent 4e48d2d commit eae024d
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Showing 3 changed files with 3 additions and 3 deletions.
2 changes: 1 addition & 1 deletion src/coreclr/gc/env/gcenv.interlocked.inl
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@
#ifndef _MSC_VER
__forceinline void Interlocked::InterlockedOperationBarrier()
{
#if defined(HOST_ARM64) || defined(HOST_LOONGARCH64)
#if defined(HOST_ARM64) || defined(HOST_LOONGARCH64) || defined(HOST_RISCV64)
// See PAL_InterlockedOperationBarrier() in the PAL
__sync_synchronize();
#endif
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2 changes: 1 addition & 1 deletion src/coreclr/gc/gc.cpp
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Expand Up @@ -26240,7 +26240,7 @@ void gc_heap::save_post_plug_info (uint8_t* last_pinned_plug, uint8_t* last_obje
}

// enable on processors known to have a useful prefetch instruction
#if defined(TARGET_AMD64) || defined(TARGET_X86) || defined(TARGET_ARM64)
#if defined(TARGET_AMD64) || defined(TARGET_X86) || defined(TARGET_ARM64) || defined(TARGET_RISCV64)
#define PREFETCH
#endif

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2 changes: 1 addition & 1 deletion src/coreclr/gc/unix/gcenv.unix.cpp
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Expand Up @@ -136,7 +136,7 @@ typedef cpuset_t cpu_set_t;
#endif
#endif // __APPLE__

#if defined(HOST_ARM) || defined(HOST_ARM64) || defined(HOST_LOONGARCH64)
#if defined(HOST_ARM) || defined(HOST_ARM64) || defined(HOST_LOONGARCH64) || defined(HOST_RISCV64)
#define SYSCONF_GET_NUMPROCS _SC_NPROCESSORS_CONF
#else
#define SYSCONF_GET_NUMPROCS _SC_NPROCESSORS_ONLN
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