JIT SVE: Assertion failed 'isVectorRegister(reg4)' during 'Generate code'

[jakobbotsch]

// Generated by Fuzzlyn v2.2 on 2024-07-30 18:00:04
// Run on Arm64 Windows
// Seed: 6768625678076243005-vectort,vector64,vector128,armsve
// Reduced from 134.0 KiB to 0.5 KiB in 00:00:38
// Hits JIT assert in Release:
// Assertion failed 'isVectorRegister(reg4)' in 'Program:Main(Fuzzlyn.ExecutionServer.IRuntime)' during 'Generate code' (IL size 51; hash 0xade6b36b; FullOpts)
//
//     File: C:\dev\dotnet\runtime\src\coreclr\jit\emitarm64sve.cpp Line: 5891
//
using System;
using System.Runtime.CompilerServices;
using System.Numerics;
using System.Runtime.Intrinsics;
using System.Runtime.Intrinsics.Arm;

public class Program
{
    public static void Main()
    {
        var vr3 = Sve.CreateTrueMaskInt32();
        var vr4 = Vector.Create<int>(1);
        var vr5 = Vector128.CreateScalar(0).AsVector();
        Vector<int> vr6 = Sve.ConditionalSelect(vr3, vr4, vr5);
        System.Console.WriteLine(vr6);
    }
}

cc @dotnet/jit-contrib @dotnet/arm64-contrib

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[a74nh]

priority:2 for RC1 snap : Functionality issue