Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

remove unnecessary Avx512VL ISA flags. #103144

Merged
merged 2 commits into from
Jun 29, 2024
Merged

remove unnecessary Avx512VL ISA flags. #103144

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
2 commits
Select commit Hold shift + click to select a range
613494e
remove Avx10v1_V512 from XArchIntrisicConstants, let it imply by Avx5…
Ruihan-Yin Jun 18, 2024
fd25653
assert Avx10/V512 can be inferred from Avx10v1 and Avx512.
Ruihan-Yin Jun 25, 2024
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
9 changes: 4 additions & 5 deletions src/coreclr/tools/Common/Compiler/HardwareIntrinsicHelpers.cs
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -74,8 +74,7 @@ private static class XArchIntrinsicConstants
public const int Avx512Vbmi = 0x10000;
public const int Serialize = 0x20000;
public const int Avx10v1 = 0x40000;
public const int Avx10v1_v512 = 0x80000;
public const int Evex = 0x100000;
public const int Evex = 0x80000;

public static void AddToBuilder(InstructionSetSupportBuilder builder, int flags)
{
Expand Down Expand Up @@ -129,7 +128,7 @@ public static void AddToBuilder(InstructionSetSupportBuilder builder, int flags)
builder.AddSupportedInstructionSet("serialize");
if ((flags & Avx10v1) != 0)
builder.AddSupportedInstructionSet("avx10v1");
if ((flags & Avx10v1_v512) != 0)
if (((flags & Avx10v1) != 0) && ((flags & Avx512) != 0))
builder.AddSupportedInstructionSet("avx10v1_v512");
if ((flags & Evex) != 0)
builder.AddSupportedInstructionSet("evex");
Expand Down Expand Up @@ -198,8 +197,8 @@ public static int FromInstructionSet(InstructionSet instructionSet)
InstructionSet.X64_X86Serialize_X64 => Serialize,
InstructionSet.X64_AVX10v1 => Avx10v1,
InstructionSet.X64_AVX10v1_X64 => Avx10v1,
InstructionSet.X64_AVX10v1_V512 => Avx10v1_v512,
InstructionSet.X64_AVX10v1_V512_X64 => Avx10v1_v512,
InstructionSet.X64_AVX10v1_V512 => (Avx10v1 | Avx512),
InstructionSet.X64_AVX10v1_V512_X64 => (Avx10v1 | Avx512),
InstructionSet.X64_EVEX => Evex,
InstructionSet.X64_EVEX_X64 => Evex,

Expand Down
29 changes: 23 additions & 6 deletions src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/HardwareIntrinsicHelpers.Aot.cs
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -49,12 +49,29 @@ public static MethodIL EmitIsSupportedIL(MethodDesc method, FieldDesc isSupporte
var emit = new ILEmitter();
ILCodeStream codeStream = emit.NewCodeStream();

codeStream.Emit(ILOpcode.ldsfld, emit.NewToken(isSupportedField));
codeStream.EmitLdc(flag);
codeStream.Emit(ILOpcode.and);
codeStream.EmitLdc(0);
codeStream.Emit(ILOpcode.cgt_un);
codeStream.Emit(ILOpcode.ret);
if(!uint.IsPow2((uint)flag))
{
// These are the ISAs managed by multiple-bit flags.
// we need to emit different IL to handle the checks.
// For now just Avx10v1_V512 = (Avx10v1 | Avx512)
// (isSupportedField & flag) == flag
codeStream.Emit(ILOpcode.ldsfld, emit.NewToken(isSupportedField));
codeStream.EmitLdc(flag);
codeStream.Emit(ILOpcode.and);
codeStream.EmitLdc(flag);
codeStream.Emit(ILOpcode.ceq);
codeStream.Emit(ILOpcode.ret);
}
else
{
// (isSupportedField & flag) >= (unsigned)0
codeStream.Emit(ILOpcode.ldsfld, emit.NewToken(isSupportedField));
codeStream.EmitLdc(flag);
codeStream.Emit(ILOpcode.and);
codeStream.EmitLdc(0);
codeStream.Emit(ILOpcode.cgt_un);
codeStream.Emit(ILOpcode.ret);
}

return emit.Link(method);
}
Expand Down
10 changes: 5 additions & 5 deletions src/coreclr/vm/codeman.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1433,12 +1433,12 @@ void EEJitManager::SetCpuInfo()
{
CPUCompileFlags.Set(InstructionSet_EVEX);
CPUCompileFlags.Set(InstructionSet_AVX10v1);
}
}

if ((cpuFeatures & XArchIntrinsicConstants_Avx10v1_V512) != 0)
{
CPUCompileFlags.Set(InstructionSet_AVX10v1_V512);
if((cpuFeatures & XArchIntrinsicConstants_Avx512) != 0)
{
CPUCompileFlags.Set(InstructionSet_AVX10v1_V512);
}
}
}
#elif defined(TARGET_ARM64)

Expand Down
12 changes: 5 additions & 7 deletions src/native/minipal/cpufeatures.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -263,13 +263,11 @@ int minipal_getcpufeatures(void)
{
result |= XArchIntrinsicConstants_Evex;
result |= XArchIntrinsicConstants_Avx10v1;

bool isV512Supported = (cpuidInfo[CPUID_EBX] & (1 << 18)) != 0; // Avx10/V512

if (isV512Supported)
{
result |= XArchIntrinsicConstants_Avx10v1_V512;
}

// We assume that the Avx10/V512 support can be inferred from
// both Avx10v1 and Avx512 being present.
assert(((cpuidInfo[CPUID_EBX] & (1 << 18)) != 0) == // Avx10/V512
((result & XArchIntrinsicConstants_Avx512) != 0));
}
}
}
Expand Down
3 changes: 1 addition & 2 deletions src/native/minipal/cpufeatures.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -30,8 +30,7 @@ enum XArchIntrinsicConstants
XArchIntrinsicConstants_Avx512Vbmi = 0x10000,
XArchIntrinsicConstants_Serialize = 0x20000,
XArchIntrinsicConstants_Avx10v1 = 0x40000,
XArchIntrinsicConstants_Avx10v1_V512 = 0x80000,
XArchIntrinsicConstants_Evex = 0x100000,
XArchIntrinsicConstants_Evex = 0x80000,
};
#endif // HOST_X86 || HOST_AMD64

Expand Down
Loading