JIT: Widen self-updates as part of IV widening #106131
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For certain Intel CPUs it can be a perf regression to keep an IV update as a 32-bit operation when the IV is later used as a 64-bit register, despite the fact that the operation should come with explicit zeroing of the upper bits.
This PR starts detecting and widening some self-updates as part of IV widening when we can prove that doing the self-update as a 64 bit operation is safe (i.e. ends up with the same zeroed upper bits).
Fix #104655
Fix
System.Collections.IndexerSet.List
regression in #99315Some code size regressions expected since the encoding for the 64 bit operations is larger. Some new strength reductions expected due to the improved logic in
AddRecMayOverflow
.Example: