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[RISC-V] Enable JitDisasmWithCodeBytes #111450

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merged 3 commits into from
Jan 16, 2025
Merged

[RISC-V] Enable JitDisasmWithCodeBytes #111450

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d10acbc
Enable JitDisasmWithCodeBytes
tomeksowi Jan 15, 2025
85c12b7
Remove unused IsMovInstruction
tomeksowi Jan 15, 2025
8852764
Format
tomeksowi Jan 15, 2025
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57 changes: 4 additions & 53 deletions src/coreclr/jit/emitriscv64.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -3552,11 +3552,14 @@ void emitter::emitDispInsName(
const BYTE* insAdr = addr - writeableOffset;

unsigned int opcode = code & 0x7f;
assert((opcode & 0x3) == 0x3);
assert((opcode & 0x3) == 0x3); // only 32-bit encodings supported

emitDispInsAddr(insAdr);
emitDispInsOffs(insOffset, doffs);

if (emitComp->opts.disCodeBytes && !emitComp->opts.disDiffable)
printf(" %08X ", code);

printf(" ");

switch (opcode)
Expand Down Expand Up @@ -4547,33 +4550,6 @@ void emitter::emitDispInsName(
NO_WAY("illegal ins within emitDisInsName!");
}

/*****************************************************************************
*
* Display (optionally) the instruction encoding in hex
*/

void emitter::emitDispInsHex(instrDesc* id, BYTE* code, size_t sz)
{
if (!emitComp->opts.disCodeBytes)
{
return;
}

// We do not display the instruction hex if we want diff-able disassembly
if (!emitComp->opts.disDiffable)
{
if (sz == 4)
{
printf(" %08X ", (*((code_t*)code)));
}
else
{
assert(sz == 0);
printf(" ");
}
}
}

void emitter::emitDispInsInstrNum(const instrDesc* id) const
{
#ifdef DEBUG
Expand Down Expand Up @@ -5319,29 +5295,4 @@ const char* emitter::emitRegName(regNumber reg, emitAttr size, bool varName) con
}
#endif

//------------------------------------------------------------------------
// IsMovInstruction: Determines whether a give instruction is a move instruction
//
// Arguments:
// ins -- The instruction being checked
//
bool emitter::IsMovInstruction(instruction ins)
{
switch (ins)
{
case INS_mov:
case INS_fsgnj_s:
case INS_fsgnj_d:
{
return true;
}

default:
{
return false;
}
}
return false;
}

#endif // defined(TARGET_RISCV64)
7 changes: 3 additions & 4 deletions src/coreclr/jit/emitriscv64.h
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Original file line number Diff line number Diff line change
Expand Up @@ -85,10 +85,9 @@ void emitOutputInstrJumpDistanceHelper(const insGroup* ig,

// Method to do check if mov is redundant with respect to the last instruction.
// If yes, the caller of this method can choose to omit current mov instruction.
static bool IsMovInstruction(instruction ins);
bool IsRedundantMov(instruction ins, emitAttr size, regNumber dst, regNumber src, bool canSkip);
bool IsRedundantLdStr(
instruction ins, regNumber reg1, regNumber reg2, ssize_t imm, emitAttr size, insFormat fmt); // New functions end.
bool IsRedundantMov(instruction ins, emitAttr size, regNumber dst, regNumber src, bool canSkip);
bool IsRedundantLdStr(
instruction ins, regNumber reg1, regNumber reg2, ssize_t imm, emitAttr size, insFormat fmt); // New functions end.

static code_t insEncodeRTypeInstr(
unsigned opcode, unsigned rd, unsigned funct3, unsigned rs1, unsigned rs2, unsigned funct7);
Expand Down
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