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Implement SVE2 ShiftArithmeticRounded, ShiftArithmeticRoundedSaturate, ShiftArithmeticSaturate #115774
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…, ShiftArithmeticSaturate
("SveVecBinOpTest.template", new Dictionary<string, string> {["TestName"] = "Sve2_ShiftArithmeticRounded_long", ["Isa"] = "Sve2", ["LoadIsa"] = "Sve2", ["Method"] = "ShiftArithmeticRounded", ["RetVectorType"] = "Vector", ["RetBaseType"] = "Int64", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "Int64", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "Int64", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetInt64()", ["NextValueOp2"] = "TestLibrary.Generator.GetInt64()", ["ConvertFunc"] = "", ["ValidateIterResult"] = "result[i] != (long) Helpers.SveShiftArithmeticRounded(left[i], right[i])", ["GetIterResult"] = "(long) Helpers.SveShiftArithmeticRounded(leftOp[i], rightOp[i])"}), | ||
("SveVecBinOpTest.template", new Dictionary<string, string> {["TestName"] = "Sve2_ShiftArithmeticRoundedSaturate_sbyte", ["Isa"] = "Sve2", ["LoadIsa"] = "Sve2", ["Method"] = "ShiftArithmeticRoundedSaturate", ["RetVectorType"] = "Vector", ["RetBaseType"] = "SByte", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "SByte", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "SByte", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetSByte()", ["NextValueOp2"] = "TestLibrary.Generator.GetSByte()", ["ConvertFunc"] = "", ["ValidateIterResult"] = "result[i] != (sbyte)Helpers.SveShiftArithmeticRoundedSaturate(left[i], right[i])", ["GetIterResult"] = "(sbyte)Helpers.SveShiftArithmeticRoundedSaturate(leftOp[i], rightOp[i])"}), | ||
("SveVecBinOpTest.template", new Dictionary<string, string> {["TestName"] = "Sve2_ShiftArithmeticRoundedSaturate_short", ["Isa"] = "Sve2", ["LoadIsa"] = "Sve2", ["Method"] = "ShiftArithmeticRoundedSaturate", ["RetVectorType"] = "Vector", ["RetBaseType"] = "Int16", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "Int16", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "Int16", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetInt16()", ["NextValueOp2"] = "TestLibrary.Generator.GetInt16()", ["ConvertFunc"] = "", ["ValidateIterResult"] = "result[i] != (short)Helpers.SveShiftArithmeticRoundedSaturate(left[i], right[i])", ["GetIterResult"] = "(short)Helpers.SveShiftArithmeticRoundedSaturate(leftOp[i], rightOp[i])"}), | ||
("SveVecBinOpTest.template", new Dictionary<string, string> {["TestName"] = "Sve2_ShiftArithmeticRoundedSaturate_int", ["Isa"] = "Sve2", ["LoadIsa"] = "Sve2", ["Method"] = "ShiftArithmeticRoundedSaturate", ["RetVectorType"] = "Vector", ["RetBaseType"] = "Int32", ["Op1VectorType"] = "Vector", ["Op1BaseType"] = "Int32", ["Op2VectorType"] = "Vector", ["Op2BaseType"] = "Int32", ["LargestVectorSize"] = "64", ["NextValueOp1"] = "TestLibrary.Generator.GetInt32()", ["NextValueOp2"] = "TestLibrary.Generator.GetInt32()", ["ConvertFunc"] = "", ["ValidateIterResult"] = "result[i] != (int) Helpers.SveShiftArithmeticRoundedSaturate(left[i], right[i])", ["GetIterResult"] = "(int) Helpers.SveShiftArithmeticRoundedSaturate(leftOp[i], rightOp[i])"}), |
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can you fix the formatting?
all the 3 also needs Refers to: src/coreclr/jit/hwintrinsiclistarm64sve.h:333 in 9ad2c4d. [](commit_id = 9ad2c4d, deletion_comment = False) |
HARDWARE_INTRINSIC(Sve2, BitwiseSelectRightInverted, -1, 3, {INS_sve_bsl2n, INS_sve_bsl2n, INS_sve_bsl2n, INS_sve_bsl2n, INS_sve_bsl2n, INS_sve_bsl2n, INS_sve_bsl2n, INS_sve_bsl2n, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_SpecialCodeGen|HW_Flag_HasRMWSemantics) | ||
HARDWARE_INTRINSIC(Sve2, ShiftArithmeticRounded, -1, -1, {INS_sve_srshl, INS_invalid, INS_sve_srshl, INS_invalid, INS_sve_srshl, INS_invalid, INS_sve_srshl, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_EmbeddedMaskedOperation|HW_Flag_HasRMWSemantics) | ||
HARDWARE_INTRINSIC(Sve2, ShiftArithmeticRoundedSaturate, -1, -1, {INS_sve_sqrshl, INS_invalid, INS_sve_sqrshl, INS_invalid, INS_sve_sqrshl, INS_invalid, INS_sve_sqrshl, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_EmbeddedMaskedOperation|HW_Flag_HasRMWSemantics) | ||
HARDWARE_INTRINSIC(Sve2, ShiftArithmeticSaturate, -1, -1, {INS_sve_sqshl, INS_invalid, INS_sve_sqshl, INS_invalid, INS_sve_sqshl, INS_invalid, INS_sve_sqshl, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_EmbeddedMaskedOperation|HW_Flag_HasRMWSemantics) |
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That was in the optional entries section, along with a bunch of others
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You can do the immediate version by broadcasting a scalar to a vector and using that
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LGTM
/ba-g failures are unrelated |
@a74nh @kunalspathak
Contributes to #115479