Add initial CoreCLR compilation support for Apple Silicon

eng/native/configureplatform.cmake

@@ -78,23 +78,12 @@ endif(CLR_CMAKE_HOST_OS STREQUAL Linux)
 if(CLR_CMAKE_HOST_OS STREQUAL Darwin)
     set(CLR_CMAKE_HOST_UNIX 1)
     set(CLR_CMAKE_HOST_OSX 1)
-    if(CLR_CROSS_COMPONENTS_BUILD)
-        # CMAKE_HOST_SYSTEM_PROCESSOR returns the value of `uname -p` on host.
-        if(CMAKE_HOST_SYSTEM_PROCESSOR STREQUAL x86_64)
-            set(CLR_CMAKE_HOST_UNIX_AMD64 1)
-        elseif(CMAKE_OSX_ARCHITECTURES STREQUAL arm64)
-            set(CLR_CMAKE_HOST_UNIX_ARM64 1)
-        else()
-            clr_unknown_arch()
-        endif()
+    if(CMAKE_OSX_ARCHITECTURES STREQUAL x86_64)
+        set(CLR_CMAKE_HOST_UNIX_AMD64 1)
+    elseif(CMAKE_OSX_ARCHITECTURES STREQUAL arm64)
+        set(CLR_CMAKE_HOST_UNIX_ARM64 1)
     else()
-        if(CMAKE_OSX_ARCHITECTURES STREQUAL x86_64)
-            set(CLR_CMAKE_HOST_UNIX_AMD64 1)
-        elseif(CMAKE_OSX_ARCHITECTURES STREQUAL arm64)
-            set(CLR_CMAKE_HOST_UNIX_ARM64 1)
-        else()
-            clr_unknown_arch()
-        endif()
+        clr_unknown_arch()
     endif()
     set(CMAKE_ASM_COMPILE_OBJECT "${CMAKE_C_COMPILER} <FLAGS> <DEFINES> <INCLUDES> -o <OBJECT> -c <SOURCE>")
 endif(CLR_CMAKE_HOST_OS STREQUAL Darwin)

src/coreclr/src/pal/src/exception/machexception.cpp

@@ -1439,6 +1439,22 @@ extern "C" void ActivationHandlerWrapper();
 extern "C" int ActivationHandlerReturnOffset;
 extern "C" unsigned int XmmYmmStateSupport();
 
+#ifdef HOST_ARM64
+bool isHardwareException(uint64_t esr)
+{
+    // Infer exception state from the ESR_EL* register value.
+    // Bits 31-26 represent the ESR.EC field
+    const int ESR_EC_SHIFT = 26;
+    const int ESR_EC_MASK = 0x3f;
+    const int esr_ec = (esr >> ESR_EC_SHIFT) & ESR_EC_MASK;
+
+    const int ESR_EC_SVC = 0x15; // Supervisor Call exception from aarch64.
+
+    // Assume only supervisor calls from aarch64 are not hardware exceptions
+    return (esr_ec != ESR_EC_SVC)
+}
+#endif
+
 /*++
 Function :
     InjectActivationInternal
@@ -1497,7 +1513,7 @@ InjectActivationInternal(CPalThread* pThread)
 #elif defined(HOST_ARM64)
         // Inject the activation only if the last ESR.EC was an SVC and therefore the thread doesn't have
         // a pending hardware exception
-        if ((ExceptionState.__esr >> 26) == 0x15)
+        if (!isHardwareException(ExceptionState.__esr))
 #else
 #error Unexpected architecture
 #endif

src/coreclr/src/pal/src/exception/machmessage.h

@@ -67,7 +67,7 @@ using namespace CorUnix;
 
 // Debug-only output with printf-style formatting.
 #define NONPAL_TRACE(_format, ...) do {                                              \
-        if (NONPAL_TRACE_ENABLED) { printf("NONPAL_TRACE: " _format, ## __VA_ARGS__); fflush(stdout); } \
+        if (NONPAL_TRACE_ENABLED) printf("NONPAL_TRACE: " _format, ## __VA_ARGS__);  \
     } while (false)
 
 #else // _DEBUG

src/coreclr/src/pal/src/libunwind_mac/src/missing-functions.c

@@ -47,13 +47,21 @@ unw_get_accessors_int (unw_addr_space_t as)
   return unw_get_accessors(as);
 }
 
+#if defined(TARGET_AMD64) && !defined(HOST_AMD64)
+#define X86_64_SCF_NONE 0
+#endif
+
+#if defined(TARGET_ARM64) && !defined(HOST_ARM64)
+#define AARCH64_SCF_NONE 0
+#endif
+
 int
 unw_is_signal_frame (unw_cursor_t *cursor)
 {
   struct cursor *c = (struct cursor *) cursor;
-#ifdef HOST_AMD64
+#ifdef TARGET_AMD64
   return c->sigcontext_format != X86_64_SCF_NONE;
-#elif defined(HOST_ARM64)
+#elif defined(TARGET_ARM64)
   return c->sigcontext_format != AARCH64_SCF_NONE;
 #else
   #error Unexpected target

src/coreclr/src/vm/arm64/stubs.cpp

@@ -1070,7 +1070,7 @@ void JIT_TailCall()
 #if !defined(DACCESS_COMPILE) && !defined(CROSSGEN_COMPILE)
 EXTERN_C void JIT_UpdateWriteBarrierState(bool skipEphemeralCheck);
 
-static void UpdateWriteBarrierState          (bool skipEphemeralCheck)
+static void UpdateWriteBarrierState(bool skipEphemeralCheck)
 {
 #if defined(HOST_OSX) && defined(HOST_ARM64)
     auto jitWriteEnableHolder = PAL_JITWriteEnable(true);
@@ -1104,12 +1104,12 @@ void InitJITHelpers1()
         }
     }
 
-    UpdateWriteBarrierState          (GCHeapUtilities::IsServerHeap());
+    UpdateWriteBarrierState(GCHeapUtilities::IsServerHeap());
 }
 
 
 #else
-void UpdateWriteBarrierState          (bool) {}
+void UpdateWriteBarrierState(bool) {}
 #endif // !defined(DACCESS_COMPILE) && !defined(CROSSGEN_COMPILE)
 
 PTR_CONTEXT GetCONTEXTFromRedirectedStubStackFrame(T_DISPATCHER_CONTEXT * pDispatcherContext)
@@ -1278,26 +1278,26 @@ void FlushWriteBarrierInstructionCache()
 #ifndef CROSSGEN_COMPILE
 int StompWriteBarrierEphemeral(bool isRuntimeSuspended)
 {
-    UpdateWriteBarrierState          (GCHeapUtilities::IsServerHeap());
+    UpdateWriteBarrierState(GCHeapUtilities::IsServerHeap());
     return SWB_PASS;
 }
 
 int StompWriteBarrierResize(bool isRuntimeSuspended, bool bReqUpperBoundsCheck)
 {
-    UpdateWriteBarrierState          (GCHeapUtilities::IsServerHeap());
+    UpdateWriteBarrierState(GCHeapUtilities::IsServerHeap());
     return SWB_PASS;
 }
 
 #ifdef FEATURE_USE_SOFTWARE_WRITE_WATCH_FOR_GC_HEAP
 int SwitchToWriteWatchBarrier(bool isRuntimeSuspended)
 {
-    UpdateWriteBarrierState          (GCHeapUtilities::IsServerHeap());
+    UpdateWriteBarrierState(GCHeapUtilities::IsServerHeap());
     return SWB_PASS;
 }
 
 int SwitchToNonWriteWatchBarrier(bool isRuntimeSuspended)
 {
-    UpdateWriteBarrierState          (GCHeapUtilities::IsServerHeap());
+    UpdateWriteBarrierState(GCHeapUtilities::IsServerHeap());
     return SWB_PASS;
 }
 #endif // FEATURE_USE_SOFTWARE_WRITE_WATCH_FOR_GC_HEAP

src/coreclr/src/vm/gcinfodecoder.cpp

@@ -1709,11 +1709,11 @@ OBJECTREF* GcInfoDecoder::GetCapturedRegister(
     _ASSERTE(regNum >= 0 && regNum <= 30);
     _ASSERTE(regNum != 18);
 
-    if(regNum == 29)
+    if (regNum == 29)
     {
         return (OBJECTREF*) &pRD->pCurrentContext->Fp;
     }
-    else if(regNum == 30)
+    else if (regNum == 30)
     {
         return (OBJECTREF*) &pRD->pCurrentContext->Lr;
     }