Fix stress apple arm64 assertion '(thisFieldOffset + EA_SIZE_IN_BYTES(attr)) <= areaSize' #48936
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sandreenko
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/azp run runtime-coreclr jitstress |
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PTAL @dotnet/jit-contrib |
| #endif // FEATURE_SIMD | ||
| { | ||
| emitAttr attr = emitTypeSize(type); | ||
| GetEmitter()->emitIns_S_R(ins_Store(type), attr, reg, outArgVarNum, thisFieldOffset); |
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@sandreenko Correct me if I am wrong - on non macos-arm64 TYP_SIMD12 is going to take 16 bytes on the stack and the JIT uses str Qd, [Xn] instruction
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@echesakovMSFT there are different cases:
- pass in regs;
- pass on stack;
x - LCL_VAR
- LCL_FLD
- OBJ/IND
- FIELD_LIST
usually, if we pass LCL_VAR SIMD12 we will use str Qd, [Xn], because we know that LCL_VAR has 4 bytes after 12 bytes of SIMD that we can read, but if SIMD12 is a field of a struct then we will have to read exactly 12 bytes, so we will have IND SIMD12(ADDR(LCL_FLD)) and it has similar logic.
| #endif // FEATURE_SIMD | ||
| { | ||
| emitAttr attr = emitTypeSize(type); | ||
| GetEmitter()->emitIns_S_R(ins_Store(type), attr, reg, outArgVarNum, thisFieldOffset); |
src/coreclr/jit/emitarm64.h
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| void emitStoreSIMD12ToLclOffset(unsigned varNum, unsigned offset, regNumber opReg, regNumber tmpReg) | ||
| { | ||
| assert(varNum != BAD_VAR_NUM); | ||
| assert((opReg != REG_NA) && (tmpReg != REG_NA)); |
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Since you validating incoming opReg ad tmpReg you also check here that they have right types, i.e. opReg is SIMD, and tmpReg is a general purpose register.
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I have added assert for opReg is SIMD but for tmp the type is unknown: for x86 we require an xmm register, for other it looks random, some places allocate integer, the other xmm.
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Fixes #48787