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JIT: Fix generating unrepresentable nullchecks on ARM64 #71687

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merged 5 commits into from
Jul 6, 2022

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@jakobbotsch jakobbotsch commented Jul 5, 2022

The logic in lowering could in some struct and primitive type cases
generate an unrepresentable NULLCHECK node for ARM64/LA64 when there
was a contained address mode. We now transform unused indirections and
create address modes in the opposite order on non-xarch to avoid these unrepresentable
nullchecks.

Fix #71684

The logic in lowering could in some struct and primitive type cases
generate an unrepresentable NULLCHECK node for ARM64/LA64, when there
was a contained address mode. We now use the width from the address
mode, if this keeps the access small enough, and otherwise clear
containedness.

Fix dotnet#71684
@dotnet-issue-labeler dotnet-issue-labeler bot added the area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI label Jul 5, 2022
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Issue Details

The logic in lowering could in some struct and primitive type cases
generate an unrepresentable NULLCHECK node for ARM64/LA64, when there
was a contained address mode. We now use the width from the address
mode, if this keeps the access small enough, and otherwise clear
containedness.

Fix #71684

Author: jakobbotsch
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area-CodeGen-coreclr

Milestone: -

Avoid creating the address mode in the first place for unrepresentable
accesses.
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cc @dotnet/jit-contrib PTAL @EgorBo

@jakobbotsch jakobbotsch requested a review from EgorBo July 6, 2022 09:16
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Assertion failed '(shiftAmount == scale) || (shiftAmount == 0)'
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