Add predefined cpu names for --instruction-set (e.g. haswell)

src/coreclr/tools/Common/Compiler/InstructionSetSupport.cs

@@ -191,6 +191,20 @@ public InstructionSetSupportBuilder(TargetArchitecture architecture)
         /// <returns>returns "false" if instruction set isn't valid on this architecture</returns>
         public bool AddSupportedInstructionSet(string instructionSet)
         {
+            // First, check if it's a "known cpu family" group of instruction sets e.g. "skylake"
+            var sets = InstructionSetFlags.CpuFamilyToInstructionSets(instructionSet, _architecture);
+            if (sets != null)
+            {
+                foreach (string set in sets)
+                {
+                    if (!s_instructionSetSupport[_architecture].ContainsKey(set))
+                        return false;
+                    _supportedInstructionSets.Add(set);
+                    _unsupportedInstructionSets.Remove(set);
+                }
+                return true;
+            }
+
             if (!s_instructionSetSupport[_architecture].ContainsKey(instructionSet))
                 return false;
 

src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs

@@ -768,6 +768,54 @@ public InstructionSetInfo(string name, string managedName, InstructionSet instru
             }
         }
 
+        public static IEnumerable<string> AllCpuFamilies()
+        {
+            // Only report these in the help, others are added to CpuFamilyToInstructionSets just for muscle memory after clang/llvm
+            yield return "generic";
+            yield return "sandybridge";
+            yield return "haswell";
+            yield return "ampere";
+            yield return "apple-m1";
+        }
+
+        public static IEnumerable<string> CpuFamilyToInstructionSets(string cpu, TargetArchitecture arch)
+        {
+            string sets = null;
+
+            if (arch == TargetArchitecture.ARM64)
+            {
+                sets = cpu switch
+                {
+                    "generic" => "base,neon",
+
+                    "ampere" => "base,neon,lse",
+
+                    "apple-m1" => "base,neon,aes,crc,dotprod,rdma,sha1,sha2,lse,rcpc",
+                    _ => null
+                };
+            }
+            else if (arch == TargetArchitecture.X64 || arch == TargetArchitecture.X86)
+            {
+                sets = cpu switch
+                {
+                    "generic" => "base,sse",
+
+                    "sandybridge" or
+                    "ivybridge" => "base,sse,sse2,sse3,ssse3,sse4.1,sse4.2,avx,popcnt",
+
+                    "haswell" or
+                    "broadwell" or
+                    "skylake" or
+                    "cannonlake" => "base,sse,sse2,sse3,ssse3,sse4.1,sse4.2,avx,avx2,bmi,fma,lzcnt,pclmul,popcnt,movbe,serialize",
+
+                    // Rosetta2
+                    "apple-m1" => "base,sse,sse2,sse3,ssse3,sse4.1,sse4.2,pclmul",
+                    _ => null
+                };
+            }
+            return sets?.Split(',');
+        }
+
         public static IEnumerable<InstructionSetInfo> ArchitectureToValidInstructionSets(TargetArchitecture architecture)
         {
             switch (architecture)

src/coreclr/tools/aot/crossgen2/CommandLineOptions.cs

@@ -239,6 +239,10 @@ public CommandLineOptions(string[] args)
                     extraHelp.Add(archString.ToString());
                 }
 
+                extraHelp.Add("");
+                extraHelp.Add(SR.CpuFamilies);
+                extraHelp.Add(string.Join(", ", Internal.JitInterface.InstructionSetFlags.AllCpuFamilies()));
+
                 argSyntax.ExtraHelpParagraphs = extraHelp;
 
                 HelpText = argSyntax.GetHelpText();

src/coreclr/tools/aot/crossgen2/Properties/Resources.resx

@@ -384,4 +384,7 @@
   <data name="ErrorNonLocalGenericsModule" xml:space="preserve">
     <value>"{0}" was specified to the --non-local-generics-module switch, but was not in the set of modules associated with the compile</value>
   </data>
+  <data name="CpuFamilies" xml:space="preserve">
+    <value>The following CPU names are predefined groups of instruction sets and can be used in --instruction-set too:</value>
+  </data>
 </root>