Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Add predefined cpu names for --instruction-set (e.g. haswell) #71911

Merged
merged 30 commits into from
Jul 13, 2022
Merged
Show file tree
Hide file tree
Changes from 25 commits
Commits
Show all changes
30 commits
Select commit Hold shift + click to select a range
e32afa0
Add known cpu families as group of instruction sets
EgorBo Jul 10, 2022
2edf8b8
Address feedback
EgorBo Jul 10, 2022
c55ce52
Fix help
EgorBo Jul 10, 2022
bf3febe
Clean up
EgorBo Jul 10, 2022
17b7fdd
Update CorInfoInstructionSet.cs
EgorBo Jul 10, 2022
50490f1
Update CorInfoInstructionSet.cs
EgorBo Jul 10, 2022
8a04be4
Update CorInfoInstructionSet.cs
EgorBo Jul 10, 2022
3e9129c
add "ampere"
EgorBo Jul 11, 2022
f0b175c
Address feedback around llc
EgorBo Jul 11, 2022
2bda735
llc doesn't have SR
EgorBo Jul 11, 2022
21fc10e
Set apple-a1 as a baseline for osx-arm64
EgorBo Jul 11, 2022
eee4fb2
Change ampere to ampere-altra
EgorBo Jul 11, 2022
6707106
Drop implied ISAs
EgorBo Jul 11, 2022
7d7dc11
Address feedback
EgorBo Jul 11, 2022
512983f
Fix ILC
EgorBo Jul 11, 2022
e5a8fac
Clean up
EgorBo Jul 11, 2022
1133ba2
Merge branch 'main' of github.com:dotnet/runtime into crossgen-known-…
EgorBo Jul 11, 2022
91bdc59
drop generic
EgorBo Jul 11, 2022
e79d798
regenerate CorInfoInstructionSet.cs
EgorBo Jul 11, 2022
32ed4e4
Address feedback
EgorBo Jul 12, 2022
21852fe
clean up
EgorBo Jul 12, 2022
17c224e
oops
EgorBo Jul 12, 2022
fa4ce66
Address feedback
EgorBo Jul 12, 2022
445c8fd
Address feedback
EgorBo Jul 12, 2022
58c5d17
Address feedback
EgorBo Jul 12, 2022
8ae07b7
Address feedback
EgorBo Jul 12, 2022
6bc0ca4
Address feedback
EgorBo Jul 12, 2022
cbb4dda
Address feedback
EgorBo Jul 12, 2022
af58650
Address feedback
EgorBo Jul 12, 2022
12f13f1
bug-fixes from testing the PR
EgorBo Jul 12, 2022
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
14 changes: 14 additions & 0 deletions src/coreclr/tools/Common/Compiler/InstructionSetSupport.cs
Original file line number Diff line number Diff line change
Expand Up @@ -191,6 +191,20 @@ public InstructionSetSupportBuilder(TargetArchitecture architecture)
/// <returns>returns "false" if instruction set isn't valid on this architecture</returns>
public bool AddSupportedInstructionSet(string instructionSet)
{
// First, check if it's a "known cpu family" group of instruction sets e.g. "haswell"
var sets = InstructionSetFlags.CpuNameToInstructionSets(instructionSet, _architecture);
if (sets != null)
{
foreach (string set in sets)
{
if (!s_instructionSetSupport[_architecture].ContainsKey(set))
return false;
_supportedInstructionSets.Add(set);
_unsupportedInstructionSets.Remove(set);
}
return true;
}

if (!s_instructionSetSupport[_architecture].ContainsKey(instructionSet))
return false;

Expand Down
24 changes: 24 additions & 0 deletions src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs
Original file line number Diff line number Diff line change
Expand Up @@ -752,6 +752,30 @@ private static InstructionSetFlags ExpandInstructionSetByReverseImplicationHelpe
return resultflags;
}

private static Dictionary<(string, TargetArchitecture), string> AllInstructionSetGroups { get; } = new()
{
{ ("x86-x64", TargetArchitecture.X64), "sse2" },
{ ("x86-x64", TargetArchitecture.X86), "sse2" },
{ ("x86-x64-v2", TargetArchitecture.X64), "sse4.2 popcnt" },
{ ("x86-x64-v2", TargetArchitecture.X86), "sse4.2 popcnt" },
{ ("x86-x64-v3", TargetArchitecture.X64), "x86-x64-v2 avx2 bmi bmi2 lznct movbe fma" },
{ ("x86-x64-v3", TargetArchitecture.X86), "x86-x64-v2 avx2 bmi bmi2 lznct movbe fma" },
{ ("skylake", TargetArchitecture.X64), "x86-x64-v3 pclmul aes" },
{ ("skylake", TargetArchitecture.X86), "x86-x64-v3 pclmul aes" },
EgorBo marked this conversation as resolved.
Show resolved Hide resolved
{ ("armv8-a", TargetArchitecture.ARM64), "neon" },
{ ("armv8-1-a", TargetArchitecture.ARM64), "armv8-a lse crc rdma sha1 sha2 aes" },
EgorBo marked this conversation as resolved.
Show resolved Hide resolved
{ ("armv8-2-a", TargetArchitecture.ARM64), "armv8-1-a" },
{ ("armv8-3-a", TargetArchitecture.ARM64), "armv8-2-a rcpc" },
{ ("armv8-4-a", TargetArchitecture.ARM64), "armv8-3-a dotprod" },
{ ("apple-m1", TargetArchitecture.ARM64), "armv8-4-a" },
};

public static IEnumerable<string> AllCpuNames =>
AllInstructionSetGroups.Keys.Select(key => key.Item1).Distinct();

public static IEnumerable<string> CpuNameToInstructionSets(string cpu, TargetArchitecture arch) =>
AllInstructionSetGroups.TryGetValue((cpu, arch), out string value) ? value.Split(' ') : null;

public struct InstructionSetInfo
{
public readonly string Name;
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -134,3 +134,18 @@ implication ,ARM64 ,Sha1 ,ArmBase
implication ,ARM64 ,Sha256 ,ArmBase
implication ,ARM64 ,Vector64 ,AdvSimd
implication ,ARM64 ,Vector128 ,AdvSimd


; ,name and aliases ,archs ,lower baselines included by implication
;
instructionsetgroup ,x86-x64 ,X64 X86 ,sse2
instructionsetgroup ,x86-x64-v2 ,X64 X86 ,sse4.2 popcnt
instructionsetgroup ,x86-x64-v3 ,X64 X86 ,x86-x64-v2 avx2 bmi bmi2 lznct movbe fma
instructionsetgroup ,skylake ,X64 X86 ,x86-x64-v3 pclmul aes

instructionsetgroup ,armv8-a ,ARM64 ,neon
instructionsetgroup ,armv8-1-a ,ARM64 ,armv8-a lse crc rdma sha1 sha2 aes
jkotas marked this conversation as resolved.
Show resolved Hide resolved
instructionsetgroup ,armv8-2-a ,ARM64 ,armv8-1-a
instructionsetgroup ,armv8-3-a ,ARM64 ,armv8-2-a rcpc
instructionsetgroup ,armv8-4-a ,ARM64 ,armv8-3-a dotprod
instructionsetgroup ,apple-m1 ,ARM64 ,armv8-4-a
Original file line number Diff line number Diff line change
Expand Up @@ -58,6 +58,8 @@ public string PublicName
}
}

record InstructionSetGroup(string Names, string Archs, string Sets);

class InstructionSetImplication
{
public string Architecture { get; }
Expand All @@ -81,6 +83,7 @@ public InstructionSetImplication(string architecture, InstructionSetImplication

List<InstructionSetInfo> _instructionSets = new List<InstructionSetInfo>();
List<InstructionSetImplication> _implications = new List<InstructionSetImplication>();
List<InstructionSetGroup> _instructionSetsGroups = new List<InstructionSetGroup>();
Dictionary<string, HashSet<string>> _64bitVariants = new Dictionary<string, HashSet<string>>();
SortedDictionary<string,int> _r2rNamesByName = new SortedDictionary<string,int>();
SortedDictionary<int,string> _r2rNamesByNumber = new SortedDictionary<int,string>();
Expand Down Expand Up @@ -184,6 +187,11 @@ public bool ParseInput(TextReader tr)
ValidateArchitectureEncountered(command[1]);
_implications.Add(new InstructionSetImplication(command[1],command[2], command[3]));
break;
case "instructionsetgroup":
if (command.Length != 4)
throw new Exception("Incorrect number of args for instructionsetgroup");
_instructionSetsGroups.Add(new InstructionSetGroup(command[1], command[2], command[3]));
break;
case "copyinstructionsets":
if (command.Length != 3)
throw new Exception("Incorrect number of args for instructionset");
Expand Down Expand Up @@ -605,6 +613,28 @@ private static InstructionSetFlags ExpandInstructionSetByReverseImplicationHelpe
return resultflags;
}

private static Dictionary<(string, TargetArchitecture), string> AllInstructionSetGroups { get; } = new()
{
");
foreach (InstructionSetGroup group in _instructionSetsGroups)
{
foreach (string name in group.Names.Split(' '))
{
foreach (string arch in group.Archs.Split(' '))
{
string key = $"\"{name}\",".PadRight(13, ' ') + $" TargetArchitecture.{arch}),".PadRight(27, ' ');
tr.WriteLine($" {{ ({key} \"{group.Sets}\" }},");
}
}
}
tr.Write(@" };

public static IEnumerable<string> AllCpuNames =>
AllInstructionSetGroups.Keys.Select(key => key.Item1).Distinct();

public static IEnumerable<string> CpuNameToInstructionSets(string cpu, TargetArchitecture arch) =>
AllInstructionSetGroups.TryGetValue((cpu, arch), out string value) ? value.Split(' ') : null;

public struct InstructionSetInfo
{
public readonly string Name;
Expand Down
14 changes: 13 additions & 1 deletion src/coreclr/tools/aot/ILCompiler/Program.cs
Original file line number Diff line number Diff line change
Expand Up @@ -305,6 +305,10 @@ private ArgumentSyntax ParseCommandLine(string[] args)
extraHelp.Add(archString.ToString());
}

extraHelp.Add("");
extraHelp.Add("The following CPU names are predefined groups of instruction sets and can be used in --instruction-set too:");
extraHelp.Add(string.Join(", ", Internal.JitInterface.InstructionSetFlags.AllCpuNames));

argSyntax.ExtraHelpParagraphs = extraHelp;
}

Expand Down Expand Up @@ -438,7 +442,15 @@ private int Run(string[] args)
}
else if (_targetArchitecture == TargetArchitecture.ARM64)
{
instructionSetSupportBuilder.AddSupportedInstructionSet("neon"); // Lower baselines included by implication
if (_targetOS == TargetOS.OSX)
{
// For osx-arm64 we know that apple-m1 is a baseline
instructionSetSupportBuilder.AddSupportedInstructionSet("apple-m1");
}
else
{
instructionSetSupportBuilder.AddSupportedInstructionSet("neon"); // Lower baselines included by implication
}
}

if (_instructionSet != null)
Expand Down
4 changes: 4 additions & 0 deletions src/coreclr/tools/aot/crossgen2/CommandLineOptions.cs
Original file line number Diff line number Diff line change
Expand Up @@ -239,6 +239,10 @@ public CommandLineOptions(string[] args)
extraHelp.Add(archString.ToString());
}

extraHelp.Add("");
extraHelp.Add(SR.CpuFamilies);
extraHelp.Add(string.Join(", ", Internal.JitInterface.InstructionSetFlags.AllCpuNames));

argSyntax.ExtraHelpParagraphs = extraHelp;

HelpText = argSyntax.GetHelpText();
Expand Down
12 changes: 10 additions & 2 deletions src/coreclr/tools/aot/crossgen2/Program.cs
Original file line number Diff line number Diff line change
Expand Up @@ -19,6 +19,7 @@
using ILCompiler.Reflection.ReadyToRun;
using ILCompiler.DependencyAnalysis;
using ILCompiler.IBC;
using System.Diagnostics;

namespace ILCompiler
{
Expand Down Expand Up @@ -236,10 +237,17 @@ private InstructionSetSupport ConfigureInstructionSetSupport()
}
else if (_targetArchitecture == TargetArchitecture.ARM64)
{
instructionSetSupportBuilder.AddSupportedInstructionSet("neon"); // Lower baselines included by implication
if (_targetOS == TargetOS.OSX)
{
// For osx-arm64 we know that apple-m1 is a baseline
instructionSetSupportBuilder.AddSupportedInstructionSet("apple-m1");
}
else
{
instructionSetSupportBuilder.AddSupportedInstructionSet("neon"); // Lower baselines included by implication
}
}


if (_commandLineOptions.InstructionSet != null)
{
List<string> instructionSetParams = new List<string>();
Expand Down
3 changes: 3 additions & 0 deletions src/coreclr/tools/aot/crossgen2/Properties/Resources.resx
Original file line number Diff line number Diff line change
Expand Up @@ -384,4 +384,7 @@
<data name="ErrorNonLocalGenericsModule" xml:space="preserve">
<value>"{0}" was specified to the --non-local-generics-module switch, but was not in the set of modules associated with the compile</value>
</data>
<data name="CpuFamilies" xml:space="preserve">
<value>The following CPU names are predefined groups of instruction sets and can be used in --instruction-set too:</value>
</data>
</root>