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WIP #83873

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WIP #83873

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bdce1f4
Remove JitForceEVEXEncoding in favor of the existing AltJit enablement
tannergooding Mar 19, 2023
30f54f1
Rename IsVexEncodingInstruction to IsVexEncodableInstruction
tannergooding Mar 19, 2023
63ccbb5
Updating the JIT to support EVEX by default
tannergooding Mar 19, 2023
1db8c9a
Mark the AVX512 ISAs as "fully implemented" since they have no unimpl…
tannergooding Mar 19, 2023
15a0755
Simplify some of the EVEX related checks in emitxarch
tannergooding Mar 19, 2023
56f27aa
Tweak the Vector512 ISA check to properly account for VL
tannergooding Mar 19, 2023
d8f9ef7
Applying formatting patch
tannergooding Mar 19, 2023
0974171
Ensure we're checking for actual KMask usage and not just potential u…
tannergooding Mar 19, 2023
2328f46
Fixing CORJIT_ALLOCMEM_FLG_RODATA_64BYTE_ALIGN for the managed VM
tannergooding Mar 20, 2023
081516d
Fixing the DoJitStressEvexEncoding check to account for VEX vs EVEX d…
tannergooding Mar 20, 2023
9e780f8
Merge remote-tracking branch 'dotnet/main' into evex
tannergooding Mar 21, 2023
222e972
Break apart an overly long assert
tannergooding Mar 21, 2023
0b9dbb3
Ensure IsBaselineVector512IsaSupported works on x86
tannergooding Mar 21, 2023
9dfbd7f
Block NI_Vector512_ExtractMostSignificantBits on x86 pending decompos…
tannergooding Mar 21, 2023
1f6fa3d
Ensure we don't overwrite 64-byte alignment for SPMI
tannergooding Mar 21, 2023
b713f69
Include Vector512 HWIntrinsic tests by default
tannergooding Mar 21, 2023
5dbbc05
WIP
BruceForstall Mar 24, 2023
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2 changes: 1 addition & 1 deletion src/coreclr/inc/clrconfigvalues.h
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Expand Up @@ -754,7 +754,7 @@ RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX512CD, W("EnableAVX512CD"), 1
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX512CD_VL, W("EnableAVX512CD_VL"), 1, "Allows AVX512CD_VL+ hardware intrinsics to be disabled")
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX512DQ, W("EnableAVX512DQ"), 1, "Allows AVX512DQ+ hardware intrinsics to be disabled")
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX512DQ_VL, W("EnableAVX512DQ_VL"), 1, "Allows AVX512DQ_VL+ hardware intrinsics to be disabled")
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX512F, W("EnableAVX512F"), 1, "Allows AVX512F+ hardware intrinsics to be disabled")
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@tannergooding tannergooding Mar 24, 2023 •
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This isn't going to change the SPMI numbers because this is a VM flag, so the ISAs reported as supported from the SPMI VM cache won't change. It does change the results for real runs, however.

If you want to see the results in SPMI, you need an additional JIT side tweak; as elaborated on here: #83648 (comment)

The plan would be for me to do the work, in a follow up PR, to allow the JIT versions of these flags (defined here: https://github.com/dotnet/runtime/blob/main/src/coreclr/jit/jitconfigvalues.h#L321-L328) to not only be used by the AltJIT to enable otherwise unsupported ISAs, but to also be used by scenarios like SPMI to disable ISAs.

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Right, I realized this based on the other issue conversation. I do like the idea of exposing the flags for SPMI usage.

RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX512F, W("EnableAVX512F"), 0, "Allows AVX512F+ hardware intrinsics to be disabled")
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX512F_VL, W("EnableAVX512F_VL"), 1, "Allows AVX512F_VL+ hardware intrinsics to be disabled")
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVXVNNI, W("EnableAVXVNNI"), 1, "Allows AVX VNNI+ hardware intrinsics to be disabled")
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableBMI1, W("EnableBMI1"), 1, "Allows BMI1+ hardware intrinsics to be disabled")
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