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Fix AreFlagsSetToZeroCmp to not consider unsupported formats #85714

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merged 2 commits into from
May 3, 2023

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tannergooding
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This resolves #85637

@dotnet-issue-labeler dotnet-issue-labeler bot added the area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI label May 3, 2023
@ghost ghost assigned tannergooding May 3, 2023
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ghost commented May 3, 2023

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Issue Details

This resolves #85637

Author: tannergooding
Assignees: -
Labels:

area-CodeGen-coreclr

Milestone: -

Comment on lines 899 to 909
if (!id->idIsReg1Write() || (id->idReg1() != reg))
{
// Don't consider instructions which didn't write a register
return false;
}

if (id->idHasMemWrite() || id->idIsReg2Write())
{
// Don't consider instructions which also wrote a mem location or second register
return false;
}
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This is more conservative than it needs to be but brings it back inline with what was previously being checked:

    switch (fmt)
    {
        case IF_RWR_CNS:
        case IF_RRW_CNS:
        case IF_RRW_SHF:
        case IF_RWR_RRD:
        case IF_RRW_RRD:
        case IF_RWR_MRD:
        case IF_RWR_SRD:
        case IF_RRW_SRD:
        case IF_RWR_ARD:
        case IF_RRW_ARD:
        case IF_RWR:
        case IF_RRD:
        case IF_RRW:
        case IF_RWR_RRD_RRD:
        case IF_RWR_RRD_MRD:
        case IF_RWR_RRD_ARD:
        case IF_RWR_RRD_SRD:
            break;
        default:
            return false;
    }

The general issue was that the check missed cases like xadd which wrote two registers or a mem location + a register and while that isn't "incorrect" to do, handling it would require more checks to ensure the correct register write impacted the flags.

I opted for the faster/more conservative fix and will log an issue tracking adding the correctly handling for cases like xadd

@jakobbotsch
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There's also AreFlagsSetForSignJumpOpt right below. Is there any way to audit the changes made in #85536 to make sure there are no other cases?

@jakobbotsch
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This also likely fixes #85687 and #85659.

@tannergooding
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Is there any way to audit the changes made in #85536 to make sure there are no other cases?

There were only a handful of places that had big switch table removals; the other places just had additions to the existing switches to cover the "missing" formats.

Of the places that removed switch tables, getMemoryOperation, emitIsInstrWritingToReg, emitGetVexPrefixSize, and emitMapFmtAtoM were already "exhaustive" and were just collapsed to use the new metadata.

That leaves AreFlagsSetForSignJumpOpt and AreFlagsSetToZeroCmp as the ones that were changed in a different way

Comment on lines +968 to 978
if (!id->idIsReg1Write() || (id->idReg1() != reg))
{
// Don't consider instructions which didn't write a register
return false;
}

if (id->idHasMemWrite() || id->idIsReg2Write())
{
// Don't consider instructions which also wrote a mem location or second register
return false;
}
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Member Author

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Similarly, the previous switch was:

    switch (fmt)
    {
        case IF_RWR_CNS:
        case IF_RRW_CNS:
        case IF_RRW_SHF:
        case IF_RWR_RRD:
        case IF_RRW_RRD:
        case IF_RWR_MRD:
        case IF_RWR_SRD:
        case IF_RRW_SRD:
        case IF_RWR_ARD:
        case IF_RRW_ARD:
        case IF_RWR:
        case IF_RRD:
        case IF_RRW:
            break;
        default:
            return false;
    }

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