LLVM 11 rebase

llvm/include/llvm/CodeGen/MachineInstr.h

@@ -36,6 +36,7 @@
 
 namespace llvm {
 
+typedef uint32_t MachineInstrFlags_t;
 class AAResults;
 template <typename T> class ArrayRef;
 class DIExpression;
@@ -102,10 +103,23 @@ class MachineInstr
                                         // no unsigned wrap.
     NoSWrap      = 1 << 12,             // Instruction supports binary operator
                                         // no signed wrap.
-    IsExact      = 1 << 13,             // Instruction supports division is
+    IsExact      = 1 << 13,              // Instruction supports division is
                                         // known to be exact.
     NoFPExcept   = 1 << 14,             // Instruction does not raise
                                         // floatint-point exceptions.
+    FnProlog     = 1 << 15,             // Instruction is part of the compiler generated
+                                        // prolog
+    FnEpilog     = 1 << 16,             // Instruction is part of the compiler generated
+                                        // epilog
+    FPtrStore    = 1 << 17,             // Instruction writes a function pointer to memory
+    FPtrCreate   = 1 << 18,             // Instruction creates a function pointer
+    CallTarget   = 1 << 19,             // first instruction of a function
+    ReturnTarget = 1 << 20,             // first instruction after a call
+    BranchTarget = 1 << 21,             // a branch lands here.
+    IsCall       = 1 << 22,
+    IsReturn     = 1 << 23,
+    IsBranch     = 1 << 24,
+    MaxFlagShift = 24
   };
 
 private:
@@ -118,7 +132,7 @@ class MachineInstr
   using OperandCapacity = ArrayRecycler<MachineOperand>::Capacity;
   OperandCapacity CapOperands;          // Capacity of the Operands array.
 
-  uint16_t Flags = 0;                   // Various bits of additional
+  MachineInstrFlags_t Flags = 0;        // Various bits of additional
                                         // information about machine
                                         // instruction.
 
@@ -304,7 +318,7 @@ class MachineInstr
   }
 
   /// Return the MI flags bitvector.
-  uint16_t getFlags() const {
+  MachineInstrFlags_t getFlags() const {
     return Flags;
   }
 
@@ -315,7 +329,7 @@ class MachineInstr
 
   /// Set a MI flag.
   void setFlag(MIFlag Flag) {
-    Flags |= (uint16_t)Flag;
+    Flags |= (MachineInstrFlags_t)Flag;
   }
 
   void setFlags(unsigned flags) {
@@ -326,7 +340,7 @@ class MachineInstr
 
   /// clearFlag - Clear a MI flag.
   void clearFlag(MIFlag Flag) {
-    Flags &= ~((uint16_t)Flag);
+    Flags &= ~((MachineInstrFlags_t)Flag);
   }
 
   /// Return true if MI is in a bundle (but not the first MI in a bundle).
@@ -1632,7 +1646,7 @@ class MachineInstr
   /// Return the MIFlags which represent both MachineInstrs. This
   /// should be used when merging two MachineInstrs into one. This routine does
   /// not modify the MIFlags of this MachineInstr.
-  uint16_t mergeFlagsWith(const MachineInstr& Other) const;
+  MachineInstrFlags_t mergeFlagsWith(const MachineInstr& Other) const;
 
   static uint16_t copyFlagsFromInstruction(const Instruction &I);
 

llvm/include/llvm/CodeGen/TargetInstrInfo.h

@@ -978,7 +978,8 @@ class TargetInstrInfo : public MCInstrInfo {
                                    MachineBasicBlock::iterator MI,
                                    Register SrcReg, bool isKill, int FrameIndex,
                                    const TargetRegisterClass *RC,
-                                   const TargetRegisterInfo *TRI) const {
+                                   const TargetRegisterInfo *TRI,
+                                   unsigned flags = 0) const {
     llvm_unreachable("Target didn't implement "
                      "TargetInstrInfo::storeRegToStackSlot!");
   }
@@ -990,7 +991,8 @@ class TargetInstrInfo : public MCInstrInfo {
                                     MachineBasicBlock::iterator MI,
                                     Register DestReg, int FrameIndex,
                                     const TargetRegisterClass *RC,
-                                    const TargetRegisterInfo *TRI) const {
+                                    const TargetRegisterInfo *TRI,
+                                    unsigned flags = 0) const {
     llvm_unreachable("Target didn't implement "
                      "TargetInstrInfo::loadRegFromStackSlot!");
   }

llvm/include/llvm/MC/MCInst.h

@@ -160,20 +160,41 @@ class MCInst {
   // These flags could be used to pass some info from one target subcomponent
   // to another, for example, from disassembler to asm printer. The values of
   // the flags have any sense on target level only (e.g. prefixes on x86).
-  unsigned Flags = 0;
+  enum : unsigned { NumFlagsBits = 31 };
+  mutable uint32_t Flags : NumFlagsBits;
 
   SMLoc Loc;
   SmallVector<MCOperand, 8> Operands;
 
 public:
+  /// Get the (implementation defined) symbol flags.
+  uint32_t getFlags() const { return Flags; }
+
+  /// Set the (implementation defined) symbol flags.
+  void setFlags(uint32_t Value) const {
+    assert(Value < (1U << NumFlagsBits) && "Out of range flags");
+    Flags = Value;
+  }
+
+  /// Modify the flags via a mask
+  void modifyFlags(uint32_t Value, uint32_t Mask) const {
+    assert(Value < (1U << NumFlagsBits) && "Out of range flags");
+    Flags = (Flags & ~Mask) | Value;
+  }
+
+  void setFlag(uint32_t Value) const {
+    modifyFlags(Value, 0);
+  }
+
+  bool getFlag(uint32_t Flag) const {
+    return Flags & Flag;
+  }
+
   MCInst() = default;
 
   void setOpcode(unsigned Op) { Opcode = Op; }
   unsigned getOpcode() const { return Opcode; }
 
-  void setFlags(unsigned F) { Flags = F; }
-  unsigned getFlags() const { return Flags; }
-
   void setLoc(SMLoc loc) { Loc = loc; }
   SMLoc getLoc() const { return Loc; }
 

llvm/include/llvm/MC/MCObjectFileInfo.h

@@ -164,6 +164,9 @@ class MCObjectFileInfo {
   /// Remarks section.
   MCSection *RemarksSection = nullptr;
 
+  // ISP Metadata Section
+  MCSection *ISPMetadataSection;
+
   /// EH frame section.
   ///
   /// It is initialized on demand so it can be overwritten (with uniquing).
@@ -401,6 +404,10 @@ class MCObjectFileInfo {
     return EHFrameSection;
   }
 
+  MCSection *getISPMetadataSection() const {
+    return ISPMetadataSection;
+  }
+
   enum Environment { IsMachO, IsELF, IsCOFF, IsWasm, IsXCOFF };
   Environment getObjectFileType() const { return Env; }
 

llvm/include/llvm/MC/MCObjectStreamer.h

@@ -124,6 +124,8 @@ class MCObjectStreamer : public MCStreamer {
   void EmitWeakReference(MCSymbol *Alias, const MCSymbol *Symbol) override;
   void ChangeSection(MCSection *Section, const MCExpr *Subsection) override;
   void EmitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI) override;
+  void EmitCommonSymbol(MCSymbol *Symbol, uint64_t Size,
+			unsigned ByteAlignment) override;
 
   /// Emit an instruction to a special fragment, because this instruction
   /// can change its size during relaxation.

llvm/include/llvm/MC/MCStreamer.h

@@ -13,6 +13,7 @@
 #ifndef LLVM_MC_MCSTREAMER_H
 #define LLVM_MC_MCSTREAMER_H
 
+#include "llvm/MC/SSITHMetadata.h"
 #include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/Optional.h"
@@ -102,6 +103,11 @@ class MCTargetStreamer {
   virtual void emitLabel(MCSymbol *Symbol);
   // Allow a target to add behavior to the emitAssignment of MCStreamer.
   virtual void emitAssignment(MCSymbol *Symbol, const MCExpr *Value);
+  // Allow a target to add behavior to the EmitInstruction of MCStreamer
+  virtual void emitInstruction(const MCInst &Inst, const MCSubtargetInfo &STI);
+  // Allow a target to add behavior or the EmitCommonSymbol of MCStreamer
+  virtual void emitCommonSymbol(MCSymbol *Symbol, uint64_t Size,
+				unsigned ByteAlignment);
 
   virtual void prettyPrintAsm(MCInstPrinter &InstPrinter, uint64_t Address,
                               const MCInst &Inst, const MCSubtargetInfo &STI,
@@ -613,6 +619,10 @@ class MCStreamer {
                             uint64_t Size = 0, unsigned ByteAlignment = 0,
                             SMLoc Loc = SMLoc()) = 0;
 
+  /// SSITH metadata write - only defined by MCELFStreamer
+  virtual void EmitSSITHMetadataEntry(SmallVector<MCFixup, 4> &Fixups,
+                                      uint8_t MD_type, uint8_t tag) {}
+
   /// Emit a thread local bss (.tbss) symbol.
   ///
   /// \param Section - The thread local common section.

llvm/include/llvm/MC/MCSymbol.h

@@ -121,7 +121,7 @@ class MCSymbol {
 
   /// The Flags field is used by object file implementations to store
   /// additional per symbol information which is not easily classified.
-  enum : unsigned { NumFlagsBits = 16 };
+  enum : unsigned { NumFlagsBits = 31 };
   mutable uint32_t Flags : NumFlagsBits;
 
   /// Index field, for use by the object file implementation.
@@ -406,7 +406,6 @@ class MCSymbol {
   /// dump - Print the value to stderr.
   void dump() const;
 
-protected:
   /// Get the (implementation defined) symbol flags.
   uint32_t getFlags() const { return Flags; }
 
@@ -421,6 +420,15 @@ class MCSymbol {
     assert(Value < (1U << NumFlagsBits) && "Out of range flags");
     Flags = (Flags & ~Mask) | Value;
   }
+
+  void setFlag(uint32_t Value) const {
+    modifyFlags(Value, 0);
+  }
+
+  bool getFlag(uint32_t Flag) const {
+    return Flags & Flag;
+  }
+
 };
 
 inline raw_ostream &operator<<(raw_ostream &OS, const MCSymbol &Sym) {