feat(rk3588): 添加 DWC3 控制器及 USB PHY 初始化支持 #43
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在此基础上还做了一些失败的尝试，没有新的进展。 |
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uboot 中 static int xhci_dwc3_probe(struct udevice *dev)
{
struct xhci_hcor *hcor;
struct xhci_hccr *hccr;
struct dwc3 *dwc3_reg;
enum usb_dr_mode dr_mode;
struct xhci_dwc3_plat *plat = dev_get_plat(dev);
int ret;
/* 1. Initialize resets */
ret = xhci_dwc3_reset_init(dev, plat);
if (ret)
return ret;
/* 2. Initialize clocks */
ret = xhci_dwc3_clk_init(dev, plat);
if (ret)
return ret;
/* 3. Map XHCI registers */
hccr = (struct xhci_hccr *)((uintptr_t)dev_remap_addr(dev));
hcor = (struct xhci_hcor *)((uintptr_t)hccr +
HC_LENGTH(xhci_readl(&(hccr)->cr_capbase)));
/* 4. Setup PHY */
ret = dwc3_setup_phy(dev, &plat->phys);
if (ret && (ret != -ENOTSUPP))
return ret;
/* 5. Get DWC3 registers */
dwc3_reg = (struct dwc3 *)((char *)(hccr) + DWC3_REG_OFFSET);
/* 6. Core initialization */
dwc3_core_init(dwc3_reg); // ← Critical: resets and configures DWC3 core
/* 7. Configure USB2 PHY */
reg = readl(&dwc3_reg->g_usb2phycfg[0]);
/* 8. Apply quirks and settings from device tree */
if (dev_read_bool(dev, "snps,dis_enblslpm_quirk"))
reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM;
if (dev_read_bool(dev, "snps,dis-u2-freeclk-exists-quirk"))
reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS;
if (dev_read_bool(dev, "snps,dis_u2_susphy_quirk"))
reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
writel(reg, &dwc3_reg->g_usb2phycfg[0]);
/* 9. Set USB mode (OTG/Host) based on device tree */
dr_mode = usb_get_dr_mode(dev_ofnode(dev));
if (dr_mode == USB_DR_MODE_OTG &&
dev_read_bool(dev, "usb-role-switch")) {
dr_mode = usb_get_role_switch_default_mode(dev_ofnode(dev));
if (dr_mode == USB_DR_MODE_UNKNOWN)
dr_mode = USB_DR_MODE_OTG;
}
if (dr_mode == USB_DR_MODE_UNKNOWN)
dr_mode = USB_DR_MODE_HOST;
/* 10. Configure DWC3 mode */
dwc3_set_mode(dwc3_reg, dr_mode);
/* 11. Register XHCI controller */
return xhci_register(dev, hccr, hcor);
} |
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Contributor
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嗨，@ZR233 我这边取得了一些进展，问下我们目前有 rk3588 的 I2C 驱动吗？ |
Member
目前还没有这个驱动，需要先做一下 |
Member
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是否可以用 非 type-c口，两个普通 usb3 口似乎是不需要这个，但是接在了hub上，感觉应该是hub没上电 |
Contributor
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我试试看 |
Contributor
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@ZR233 看起来 port0 和 port1 都成功了！我先清理一下代码，然后再切换成 review 状态。 |
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- Add DWC3 core initialization with host mode configuration - Add full USBDP PHY1 initialization (lane mux, PLL lock, reset sequence) - Add USB2PHY1 initialization with bvalid/iddig control - Integrate PHY init into xHCI driver for RK3588 - Fix GUSB3PIPECTL DEPOCHANGE quirk - Correct PHY reset sequence order and base addresses
- Add VBUS GPIO toggle to reset GL3523 hub during initialization - Integrate VBUS toggle into xHCI driver - Add aggressive_usb_reset feature flag for optional VBUS workaround - Consolidate delay functions into shared delay module
- Add extended VBUS power cycle and USB2-only mode tests - Add try_vbus_gpio_toggle_timed helper for timing optimization - Extract duplicated constants to module level - Replace inline spin delays with helper functions - Tidy test code structure
- dwc3.rs: keep only is_dwc3_xhci(), remove unused Dwc3 struct and init code - rk3588_phy.rs: keep only VBUS toggle functions, remove unused USBDP PHY code - root.rs: remove 4 unused port speed helper methods - delay.rs: remove unused delay_us(), keep only delay_ms()
Contributor
Author
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终于！现在可以 Review 了。 |
Member
|
测试可以启用，确实是vbus 电源开启后，能连接！非常感谢！ |
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变更概览
测试
usb start后，检测到两个 USB 端口，后续仍然卡在WaitMap处：这个 PR（拉取请求）主要是通过 Claude Code (Claude Opus 4.5) 和 OpenCode + oh-my-opencode (Claude Opus 4.5) 编写的，随后由我进行了人工复核。我对本 PR 中的所有更改负完全责任。我已尽力确保其符合我们的目标，但可能仍有一些细微的疏漏。如果发现任何不妥之处，请指出来，我会尽快修复。