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Fix support for ARM, RISC-V, LoongArch detection #2139
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The CPU frequency is also wrong (it shows only the little core freq, not the big core one) |
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圈子好小 qwq |
hykilpikonna
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Jul 30, 2022
… ARM CPU Upstream PR: dylanaraps/neofetch#2139 Thanks to @saeziae Co-authored-by: Estela Xu <i@estela.cn>
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合并到 HyFetch 里面啦。会加入到下一个版本的 （看 neofetch 半年没接过 PR 了我要借机 take over！ |
hykilpikonna
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Jul 31, 2022
This was referenced Jul 31, 2022
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This is working on a Raspberry Pi.
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hykilpikonna
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Sep 6, 2022
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Found a bug: This method fails to detect cpu for riscv on QEMU. It can be solved by moving the fallback cpu detection outside the switch-case block. (i.e. if no cpu is detected with platform-specific methods, try using the
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saeziae
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hykilpikonna
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Sep 10, 2022
…C-V, LoongArch detection Upstream PR: dylanaraps/neofetch#2139 Thanks to @saeziae Co-authored-by: Estela Xu <i@estela.cn>
hykilpikonna
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Sep 20, 2022
peeweep
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Nov 17, 2022
Closes: https://bugs.gentoo.org/881591 Upstream: dylanaraps/neofetch#2139 Signed-off-by: jinqiang zhang <peeweep@0x0.ee>
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Nov 17, 2022
Closes: https://bugs.gentoo.org/881591 Upstream: dylanaraps/neofetch#2139 Signed-off-by: jinqiang zhang <peeweep@0x0.ee>
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Nov 23, 2022
Closes: https://bugs.gentoo.org/881591 Upstream: dylanaraps/neofetch#2139 Signed-off-by: jinqiang zhang <peeweep@0x0.ee> Closes: #28305 Signed-off-by: Joonas Niilola <juippis@gentoo.org>
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What is the status of this PR? I would like to make a PR to improve neofetch on RISC-V, but I don't want to conflict with this work. |
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Description
Use lscpu to get name of ARM CPU, tested on HiSilicon and Phytium machines.
cpuinfo shows ARM CPU implementer and model as binary information stored at cpuid register, e.g.
0x48means HiSilicon, lscpu uses a lookup table to decode that, utilising lscpu could avoid maintaining the lookup table ourselves.Update 20220731
Update 20220909
P.S.:
small bugfix: fixed the bug of that the scripts deleting postfixes not matching those CPUs saying
with Radeon Graphics