I2S Right Channel is One Sample Shifted in Time from Left

[frohro]

Hi @earlephilhower ,
My testing today seems to indicate that there is a one time sample shift between the right and left channels using the latest master branch. It also seems to be true with the release branch using the Arduino IDE (using 3.7.2 shifting the data left 9 bits instead of 8). Here is what a 1 kHz wave looks like sampled at 48 kHz. And here is what a24 kHz wave looks like sampled at 48 kHz. Notice every other sample is 180 degrees out of phase with the previous. The overall amplitude goes up and down sinusoidally because the sampling rate is not exactly 48 kHz due to the Pico clock frequency. Here is the example program I used to test this.
The discontinuities are because the Serial.printf() cannot always keep up with the 48 kHz read of new data.

Here is the code for the latest master branch.

#include <I2S.h>
#include <Arduino.h>

#define RATE 48000
#define MCLK_MULT 256

I2S i2s(INPUT);

void setup() {
  Serial.begin();
  i2s.setDATA(2); // These are the pins for the data on the SDR-TRX
  i2s.setBCLK(0);
  i2s.setMCLK(3);
  // Note: LRCK pin is BCK pin plus 1 (1 in this case).
  i2s.setSysClk(RATE);
  i2s.setBitsPerSample(24);
  i2s.setFrequency(RATE);
  i2s.setMCLKmult(MCLK_MULT);
  i2s.setBuffers(32, 0, 0);
  i2s.begin();

  while (1) {
    int32_t l, r;
    i2s.read32(&l, &r);
    l = l << 8;
    r = r << 8;
    Serial.printf("%d %d\r\n", l, r);
  }
}

void loop() {}

[earlephilhower]

The fix y'day ended up shifting in one dummy sample, essentially swapping L and R channels. #2124 will end up starting with 2 dummy samples, leaving L and R aligned.