Add minimal Component Architecture for Result library

docs/features/baselibs/docs/architecture/index.rst

@@ -83,7 +83,7 @@ Static Architecture
    :safety: ASIL_B
    :status: valid
    :fulfils: feat_req__baselibs__core_utilities
-   :includes: logic_arc_int__baselibs__json, logic_arc_int__baselibs__memory_shared, logic_arc_int__baselibs__message_passing
+   :includes: logic_arc_int__baselibs__json, logic_arc_int__baselibs__memory_shared, logic_arc_int__baselibs__message_passing, logic_arc_int__baselibs__result
 
    .. needarch::
       :scale: 50
@@ -100,4 +100,4 @@ The Baselibs feature exposes the following logical interfaces defined in the :do
    :style: table
    :columns: title;id;status
    :sort: title
-   :filter: id in ['logic_arc_int__baselibs__json', 'logic_arc_int__baselibs__memory_shared', 'logic_arc_int__baselibs__message_passing']
+   :filter: id in ['logic_arc_int__baselibs__json', 'logic_arc_int__baselibs__memory_shared', 'logic_arc_int__baselibs__message_passing' ,'logic_arc_int__baselibs__result']

docs/modules/baselibs/docs/index.rst

@@ -14,7 +14,7 @@
 
 .. mod_view_sta:: Baselibs
    :id: mod_view_sta__baselibs__baselibs
-   :includes: comp_arc_sta__baselibs__json, comp_arc_sta__baselibs__message_passing, comp_arc_sta__baselibs__memory_shared
+   :includes: comp_arc_sta__baselibs__json, comp_arc_sta__baselibs__message_passing, comp_arc_sta__baselibs__memory_shared, comp_arc_sta__baselibs__result
 
    .. needarch::
       :scale: 50

docs/modules/baselibs/result/docs/architecture/index.rst

@@ -0,0 +1,58 @@
+..
+   # *******************************************************************************
+   # Copyright (c) 2025 Contributors to the Eclipse Foundation
+   #
+   # See the NOTICE file(s) distributed with this work for additional
+   # information regarding copyright ownership.
+   #
+   # This program and the accompanying materials are made available under the
+   # terms of the Apache License Version 2.0 which is available at
+   # https://www.apache.org/licenses/LICENSE-2.0
+   #
+   # SPDX-License-Identifier: Apache-2.0
+   # *******************************************************************************
+
+Result Component Architecture
+*****************************
+
+.. comp_arc_sta:: Result
+   :id: comp_arc_sta__baselibs__result
+   :security: YES
+   :safety: ASIL_B
+   :status: valid
+   :tags: baselibs_result
+   :implements: logic_arc_int__baselibs__result
+
+   .. needarch::
+      :scale: 50
+      :align: center
+
+      {{ draw_component(need(), needs) }}
+
+
+.. logic_arc_int:: Result
+   :id: logic_arc_int__baselibs__result
+   :security: YES
+   :safety: ASIL_B
+   :status: valid
+
+.. logic_arc_int_op:: Set Result
+   :id: logic_arc_int_op__baselibs__set_result
+   :security: YES
+   :safety:  ASIL_B
+   :status: valid
+   :included_by: logic_arc_int__baselibs__result
+
+.. logic_arc_int_op:: Get Value
+   :id: logic_arc_int_op__baselibs__get_value
+   :security: YES
+   :safety:  ASIL_B
+   :status: valid
+   :included_by: logic_arc_int__baselibs__result
+
+.. logic_arc_int_op:: Get Error
+   :id: logic_arc_int_op__baselibs__get_error
+   :security: YES
+   :safety:  ASIL_B
+   :status: valid
+   :included_by: logic_arc_int__baselibs__result

docs/modules/baselibs/result/docs/index.rst

@@ -18,4 +18,5 @@ result
 .. toctree::
    :hidden:
 
-   requirements
+   requirements.rst
+   architecture/index.rst