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Submission template for Tiny Tapeout 9 - Verilog HDL Projects
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electrobug14/tt09-verilog-template
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Submission template for Tiny Tapeout 9 - Verilog HDL Projects
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- Verilog 38.6%
- Python 20.6%
- Makefile 20.2%
- Dockerfile 18.7%
- Shell 1.9%