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A logic synthesis and manipulation infrastructure for FPGAs
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LLHDL - Low Level Hardware Description Language A logic synthesis and manipulation infrastructure for FPGAs. (C) Copyright 2010, 2011 Sebastien Bourdeauducq. Released under GNU GPL version 3. See file COPYING. Build requirements: * Clang * CMake * re2c * Lemon parser generator * GMP * Python Build/installation instructions: $ mkdir build $ cd build $ cmake .. $ make # make install Then you can try the example designs in the "designs" folder. Xilinx ISE is still needed for the place and route and bitstream encoding phases. Homepage: http://www.milkymist.org/fpgatools
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