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Add hyperbus #574

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1 change: 1 addition & 0 deletions Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -159,6 +159,7 @@ app: clean-app
echo "\033[0;31mI would start by checking b) if I were you!\033[0m"; \
exit 1; \
}
python post_proc_hex.py sw/build/main.hex sw/build/main.hex

## Just list the different application names available
app-list:
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3 changes: 3 additions & 0 deletions core-v-mini-mcu.core
Original file line number Diff line number Diff line change
Expand Up @@ -20,6 +20,8 @@ filesets:
- pulp-platform.org::cluster_interconnect
- pulp-platform.org::riscv_dbg
- pulp-platform.org::register_interface
- pulp-platform.org::hyperbus
- pulp-platform.org::axi_heep
- openhwgroup.org:ip:soc_ctrl
- lowrisc:ip:uart:0.1
- lowrisc:ip:rv_plic_example:0.1
Expand Down Expand Up @@ -48,6 +50,7 @@ filesets:
- hw/core-v-mini-mcu/debug_subsystem.sv
- hw/core-v-mini-mcu/peripheral_subsystem.sv
- hw/core-v-mini-mcu/ao_peripheral_subsystem.sv
- hw/core-v-mini-mcu/hyperbus_subsystem.sv
file_type: systemVerilogSource

rtl-simulation:
Expand Down
7 changes: 7 additions & 0 deletions hw/core-v-mini-mcu/ao_peripheral_subsystem.sv
Original file line number Diff line number Diff line change
Expand Up @@ -75,6 +75,10 @@ module ao_peripheral_subsystem
output reg_req_t pad_req_o,
input reg_rsp_t pad_resp_i,

//HyperBus Regs
output reg_req_t hyperbus_req_o,
input reg_rsp_t hyperbus_rsp_i,

// FAST INTR CTRL
input logic [14:0] fast_intr_i,
output logic [14:0] fast_intr_o,
Expand Down Expand Up @@ -361,6 +365,9 @@ module ao_peripheral_subsystem
assign pad_req_o = ao_peripheral_slv_req[core_v_mini_mcu_pkg::PAD_CONTROL_IDX];
assign ao_peripheral_slv_rsp[core_v_mini_mcu_pkg::PAD_CONTROL_IDX] = pad_resp_i;

assign hyperbus_req_o = ao_peripheral_slv_req[core_v_mini_mcu_pkg::HYPERBUS_IDX];
assign ao_peripheral_slv_rsp[core_v_mini_mcu_pkg::HYPERBUS_IDX] = hyperbus_rsp_i;

fast_intr_ctrl #(
.reg_req_t(reg_pkg::reg_req_t),
.reg_rsp_t(reg_pkg::reg_rsp_t)
Expand Down
194 changes: 136 additions & 58 deletions hw/core-v-mini-mcu/core_v_mini_mcu.sv
Original file line number Diff line number Diff line change
Expand Up @@ -100,22 +100,6 @@ module core_v_mini_mcu
input logic gpio_13_i,
output logic gpio_13_oe_o,

output logic gpio_14_o,
input logic gpio_14_i,
output logic gpio_14_oe_o,

output logic gpio_15_o,
input logic gpio_15_i,
output logic gpio_15_oe_o,

output logic gpio_16_o,
input logic gpio_16_i,
output logic gpio_16_oe_o,

output logic gpio_17_o,
input logic gpio_17_i,
output logic gpio_17_oe_o,

output logic spi_flash_sck_o,
input logic spi_flash_sck_i,
output logic spi_flash_sck_oe_o,
Expand Down Expand Up @@ -172,103 +156,150 @@ module core_v_mini_mcu
input logic spi_sd_3_i,
output logic spi_sd_3_oe_o,

output logic pdm2pcm_pdm_o,
input logic pdm2pcm_pdm_i,
output logic pdm2pcm_pdm_oe_o,
output logic hyper_cs_no,
output logic gpio_14_o,
input logic gpio_14_i,
output logic gpio_14_oe_o,

output logic hyper_ck_o,
output logic gpio_15_o,
input logic gpio_15_i,
output logic gpio_15_oe_o,

output logic hyper_ckn_o,
output logic gpio_16_o,
input logic gpio_16_i,
output logic gpio_16_oe_o,

output logic hyper_rwds_o,
input logic hyper_rwds_i,
output logic hyper_rwds_oe_o,
output logic gpio_17_o,
input logic gpio_17_i,
output logic gpio_17_oe_o,

output logic hyper_reset_no,
output logic gpio_18_o,
input logic gpio_18_i,
output logic gpio_18_oe_o,
output logic spi2_cs_0_o,
input logic spi2_cs_0_i,
output logic spi2_cs_0_oe_o,

output logic pdm2pcm_clk_o,
input logic pdm2pcm_clk_i,
output logic pdm2pcm_clk_oe_o,
output logic hyper_dq_0_o,
input logic hyper_dq_0_i,
output logic hyper_dq_0_oe_o,
output logic gpio_19_o,
input logic gpio_19_i,
output logic gpio_19_oe_o,
output logic spi2_sd_0_o,
input logic spi2_sd_0_i,
output logic spi2_sd_0_oe_o,

output logic i2s_sck_o,
input logic i2s_sck_i,
output logic i2s_sck_oe_o,
output logic hyper_dq_1_o,
input logic hyper_dq_1_i,
output logic hyper_dq_1_oe_o,
output logic gpio_20_o,
input logic gpio_20_i,
output logic gpio_20_oe_o,
output logic spi2_sd_1_o,
input logic spi2_sd_1_i,
output logic spi2_sd_1_oe_o,

output logic i2s_ws_o,
input logic i2s_ws_i,
output logic i2s_ws_oe_o,
output logic hyper_dq_2_o,
input logic hyper_dq_2_i,
output logic hyper_dq_2_oe_o,
output logic gpio_21_o,
input logic gpio_21_i,
output logic gpio_21_oe_o,
output logic spi2_sd_2_o,
input logic spi2_sd_2_i,
output logic spi2_sd_2_oe_o,

output logic i2s_sd_o,
input logic i2s_sd_i,
output logic i2s_sd_oe_o,
output logic hyper_dq_3_o,
input logic hyper_dq_3_i,
output logic hyper_dq_3_oe_o,
output logic gpio_22_o,
input logic gpio_22_i,
output logic gpio_22_oe_o,
output logic spi2_sd_3_o,
input logic spi2_sd_3_i,
output logic spi2_sd_3_oe_o,

output logic spi2_cs_0_o,
input logic spi2_cs_0_i,
output logic spi2_cs_0_oe_o,
output logic hyper_dq_4_o,
input logic hyper_dq_4_i,
output logic hyper_dq_4_oe_o,
output logic gpio_23_o,
input logic gpio_23_i,
output logic gpio_23_oe_o,
output logic spi2_sck_o,
input logic spi2_sck_i,
output logic spi2_sck_oe_o,

output logic spi2_cs_1_o,
input logic spi2_cs_1_i,
output logic spi2_cs_1_oe_o,
output logic hyper_dq_5_o,
input logic hyper_dq_5_i,
output logic hyper_dq_5_oe_o,
output logic gpio_24_o,
input logic gpio_24_i,
output logic gpio_24_oe_o,
output logic pdm2pcm_pdm_o,
input logic pdm2pcm_pdm_i,
output logic pdm2pcm_pdm_oe_o,

output logic spi2_sck_o,
input logic spi2_sck_i,
output logic spi2_sck_oe_o,
output logic hyper_dq_6_o,
input logic hyper_dq_6_i,
output logic hyper_dq_6_oe_o,
output logic gpio_25_o,
input logic gpio_25_i,
output logic gpio_25_oe_o,
output logic pdm2pcm_clk_o,
input logic pdm2pcm_clk_i,
output logic pdm2pcm_clk_oe_o,

output logic spi2_sd_0_o,
input logic spi2_sd_0_i,
output logic spi2_sd_0_oe_o,
output logic hyper_dq_7_o,
input logic hyper_dq_7_i,
output logic hyper_dq_7_oe_o,
output logic gpio_26_o,
input logic gpio_26_i,
output logic gpio_26_oe_o,
output logic spi2_cs_1_o,
input logic spi2_cs_1_i,
output logic spi2_cs_1_oe_o,

output logic spi2_sd_1_o,
input logic spi2_sd_1_i,
output logic spi2_sd_1_oe_o,
output logic i2s_sck_o,
input logic i2s_sck_i,
output logic i2s_sck_oe_o,
output logic gpio_27_o,
input logic gpio_27_i,
output logic gpio_27_oe_o,

output logic spi2_sd_2_o,
input logic spi2_sd_2_i,
output logic spi2_sd_2_oe_o,
output logic i2s_ws_o,
input logic i2s_ws_i,
output logic i2s_ws_oe_o,
output logic gpio_28_o,
input logic gpio_28_i,
output logic gpio_28_oe_o,

output logic spi2_sd_3_o,
input logic spi2_sd_3_i,
output logic spi2_sd_3_oe_o,
output logic i2s_sd_o,
input logic i2s_sd_i,
output logic i2s_sd_oe_o,
output logic gpio_29_o,
input logic gpio_29_i,
output logic gpio_29_oe_o,

output logic i2c_scl_o,
input logic i2c_scl_i,
output logic i2c_scl_oe_o,
output logic gpio_31_o,
input logic gpio_31_i,
output logic gpio_31_oe_o,
output logic gpio_30_o,
input logic gpio_30_i,
output logic gpio_30_oe_o,

output logic i2c_sda_o,
input logic i2c_sda_i,
output logic i2c_sda_oe_o,
output logic gpio_30_o,
input logic gpio_30_i,
output logic gpio_30_oe_o,
output logic gpio_31_o,
input logic gpio_31_i,
output logic gpio_31_oe_o,


// eXtension interface
Expand Down Expand Up @@ -376,6 +407,11 @@ module core_v_mini_mcu
obi_req_t peripheral_slave_req;
obi_resp_t peripheral_slave_resp;

obi_req_t hyperram_req;
obi_resp_t hyperram_resp;
reg_req_t hyperbus_req;
reg_rsp_t hyperbus_rsp;

// signals to debug unit
logic debug_core_req;
logic debug_reset_n;
Expand Down Expand Up @@ -584,6 +620,8 @@ module core_v_mini_mcu
.ao_peripheral_slave_resp_i(ao_peripheral_slave_resp),
.peripheral_slave_req_o(peripheral_slave_req),
.peripheral_slave_resp_i(peripheral_slave_resp),
.hyperram_req_o(hyperram_req),
.hyperram_resp_i(hyperram_resp),
.flash_mem_slave_req_o(flash_mem_slave_req),
.flash_mem_slave_resp_i(flash_mem_slave_resp),
.ext_core_instr_req_o(ext_core_instr_req_o),
Expand Down Expand Up @@ -657,6 +695,8 @@ module core_v_mini_mcu
.spi_flash_intr_event_o(spi_flash_intr),
.pad_req_o,
.pad_resp_i,
.hyperbus_req_o(hyperbus_req),
.hyperbus_rsp_i(hyperbus_rsp),
.fast_intr_i(fast_intr),
.fast_intr_o(irq_fast),
.cio_gpio_i(gpio_ao_in),
Expand Down Expand Up @@ -757,6 +797,44 @@ module core_v_mini_mcu
end
end

logic [7:0] hyper_dq_in, hyper_dq_out;
logic hyper_dq_oe;

assign hyper_dq_in = {
hyper_dq_0_i,
hyper_dq_1_i,
hyper_dq_2_i,
hyper_dq_3_i,
hyper_dq_4_i,
hyper_dq_5_i,
hyper_dq_6_i,
hyper_dq_7_i
};
assign {hyper_dq_0_o, hyper_dq_1_o, hyper_dq_2_o, hyper_dq_3_o, hyper_dq_4_o, hyper_dq_5_o, hyper_dq_6_o, hyper_dq_7_o} = hyper_dq_out;
assign {hyper_dq_0_oe_o, hyper_dq_1_oe_o, hyper_dq_2_oe_o, hyper_dq_3_oe_o, hyper_dq_4_oe_o, hyper_dq_5_oe_o, hyper_dq_6_oe_o, hyper_dq_7_oe_o} = {8{hyper_dq_oe}};

hyperbus_subsystem hyperbus_subsystem_i (
.clk_i,
.clk_per_i(clk_i),
.rst_ni,
.obi_req_i(hyperram_req),
.obi_resp_o(hyperram_resp),
.reg_req_i(hyperbus_req),
.reg_rsp_o(hyperbus_rsp),
// Physical interace: facing HyperBus PADs
.hyper_cs_no,
.hyper_ck_o,
.hyper_ck_no(hyper_ckn_o),
.hyper_rwds_o,
.hyper_rwds_i,
.hyper_rwds_oe_o,
.hyper_dq_i(hyper_dq_in),
.hyper_dq_o(hyper_dq_out),
.hyper_dq_oe_o(hyper_dq_oe),
.hyper_reset_no
);


assign ext_cpu_subsystem_rst_no = cpu_subsystem_rst_n;
assign ext_debug_reset_no = debug_reset_n;

Expand Down
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