Rename config, fix changelog

esp-rs · Nov 21, 2024 · f047c2e · f047c2e
1 parent 68d7737
commit f047c2e
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Showing 5 changed files with 21 additions and 21 deletions.
diff --git a/esp-hal/CHANGELOG.md b/esp-hal/CHANGELOG.md
@@ -18,7 +18,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 
 ### Removed
 
-- The `configure` DMA channel functions has been removed (#2403)
+- The `configure` and `configure_for_async` DMA channel functions has been removed (#2403)
 
 ## [0.22.0] - 2024-11-20
 

diff --git a/esp-hal/src/dma/buffers.rs b/esp-hal/src/dma/buffers.rs
@@ -11,15 +11,15 @@ use crate::soc::is_slice_in_psram;
 /// Burst transfer configuration.
 #[derive(Clone, Copy, PartialEq, Eq, Debug)]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
-pub enum BurstTransfer {
+pub enum BurstConfig {
     /// Burst mode is disabled.
     Disabled,
 
     /// Burst mode is enabled.
     Enabled,
 }
 
-impl BurstTransfer {
+impl BurstConfig {
     pub(super) fn is_burst_enabled(self) -> bool {
         !matches!(self, Self::Disabled)
     }
@@ -66,7 +66,7 @@ pub struct Preparation {
     /// [`TransferDirection::Out`] burst transfers, but
     /// [`TransferDirection::In`] transfers require all descriptors to have
     /// buffer pointers and sizes that are a multiple of 4 (word aligned).
-    pub burst_transfer: BurstTransfer,
+    pub burst_transfer: BurstConfig,
 
     /// Configures the "check owner" feature of the DMA channel.
     ///
@@ -375,7 +375,7 @@ unsafe impl DmaTxBuffer for DmaTxBuf {
             #[cfg(esp32s3)]
             external_memory_block_size: self.block_size,
             // TODO: support burst transfers.
-            burst_transfer: BurstTransfer::Disabled,
+            burst_transfer: BurstConfig::Disabled,
             check_owner: None,
         }
     }
@@ -531,7 +531,7 @@ unsafe impl DmaRxBuffer for DmaRxBuf {
             // TODO: DmaRxBuf doesn't currently enforce the alignment requirements required for
             // bursting. In the future, it could either enforce the alignment or
             // calculate if the alignment requirements happen to be met.
-            burst_transfer: BurstTransfer::Disabled,
+            burst_transfer: BurstConfig::Disabled,
             check_owner: None,
         }
     }
@@ -663,7 +663,7 @@ unsafe impl DmaTxBuffer for DmaRxTxBuf {
             external_memory_block_size: None,
 
             // TODO: This is TX, the DMA channel is free to do a burst transfer.
-            burst_transfer: BurstTransfer::Disabled,
+            burst_transfer: BurstConfig::Disabled,
             check_owner: None,
         }
     }
@@ -699,7 +699,7 @@ unsafe impl DmaRxBuffer for DmaRxTxBuf {
 
             // TODO: DmaRxTxBuf doesn't currently enforce the alignment requirements required for
             // bursting.
-            burst_transfer: BurstTransfer::Disabled,
+            burst_transfer: BurstConfig::Disabled,
             check_owner: None,
         }
     }
@@ -844,7 +844,7 @@ unsafe impl DmaRxBuffer for DmaRxStreamBuf {
 
             // TODO: DmaRxStreamBuf doesn't currently enforce the alignment requirements required
             // for bursting.
-            burst_transfer: BurstTransfer::Disabled,
+            burst_transfer: BurstConfig::Disabled,
 
             // Whilst we give ownership of the descriptors the DMA, the correctness of this buffer
             // implementation doesn't rely on the DMA checking for descriptor ownership.
@@ -1057,7 +1057,7 @@ unsafe impl DmaTxBuffer for EmptyBuf {
             direction: TransferDirection::Out,
             #[cfg(esp32s3)]
             external_memory_block_size: None,
-            burst_transfer: BurstTransfer::Disabled,
+            burst_transfer: BurstConfig::Disabled,
 
             // As we don't give ownership of the descriptor to the DMA, it's important that the DMA
             // channel does *NOT* check for ownership, otherwise the channel will return an error.
@@ -1088,7 +1088,7 @@ unsafe impl DmaRxBuffer for EmptyBuf {
             direction: TransferDirection::In,
             #[cfg(esp32s3)]
             external_memory_block_size: None,
-            burst_transfer: BurstTransfer::Disabled,
+            burst_transfer: BurstConfig::Disabled,
 
             // As we don't give ownership of the descriptor to the DMA, it's important that the DMA
             // channel does *NOT* check for ownership, otherwise the channel will return an error.
@@ -1167,7 +1167,7 @@ unsafe impl DmaTxBuffer for DmaLoopBuf {
             // TODO: support external memory access.
             #[cfg(esp32s3)]
             external_memory_block_size: None,
-            burst_transfer: BurstTransfer::Disabled,
+            burst_transfer: BurstConfig::Disabled,
             // The DMA must not check the owner bit, as it is never set.
             check_owner: Some(false),
         }

diff --git a/esp-hal/src/dma/gdma.rs b/esp-hal/src/dma/gdma.rs
@@ -169,7 +169,7 @@ impl<C: GdmaChannel> RegisterAccess for ChannelTxImpl<C> {
         conf0.modify(|_, w| w.out_rst().clear_bit());
     }
 
-    fn set_burst_mode(&self, burst_mode: BurstTransfer) {
+    fn set_burst_mode(&self, burst_mode: BurstConfig) {
         self.ch()
             .out_conf0()
             .modify(|_, w| w.out_data_burst_en().bit(burst_mode.is_burst_enabled()));
@@ -393,7 +393,7 @@ impl<C: GdmaChannel> RegisterAccess for ChannelRxImpl<C> {
         conf0.modify(|_, w| w.in_rst().clear_bit());
     }
 
-    fn set_burst_mode(&self, burst_mode: BurstTransfer) {
+    fn set_burst_mode(&self, burst_mode: BurstConfig) {
         self.ch()
             .in_conf0()
             .modify(|_, w| w.in_data_burst_en().bit(burst_mode.is_burst_enabled()));

diff --git a/esp-hal/src/dma/mod.rs b/esp-hal/src/dma/mod.rs
@@ -1847,7 +1847,7 @@ where
                 #[cfg(esp32s3)]
                 external_memory_block_size: None,
                 direction: TransferDirection::In,
-                burst_transfer: BurstTransfer::Disabled,
+                burst_transfer: BurstConfig::Disabled,
                 check_owner: Some(false),
             },
             peri,
@@ -2142,7 +2142,7 @@ where
                 #[cfg(esp32s3)]
                 external_memory_block_size: None,
                 direction: TransferDirection::Out,
-                burst_transfer: BurstTransfer::Disabled,
+                burst_transfer: BurstConfig::Disabled,
                 check_owner: Some(false),
             },
             peri,
@@ -2227,7 +2227,7 @@ pub trait RegisterAccess: crate::private::Sealed {
 
     /// Enable/Disable INCR burst transfer for channel reading
     /// accessing data in internal RAM.
-    fn set_burst_mode(&self, burst_mode: BurstTransfer);
+    fn set_burst_mode(&self, burst_mode: BurstConfig);
 
     /// Enable/Disable burst transfer for channel reading
     /// descriptors in internal RAM.

diff --git a/esp-hal/src/dma/pdma.rs b/esp-hal/src/dma/pdma.rs
@@ -57,7 +57,7 @@ impl<C: PdmaChannel<RegisterBlock = SpiRegisterBlock>> RegisterAccess for SpiDma
         spi.dma_conf().modify(|_, w| w.out_rst().clear_bit());
     }
 
-    fn set_burst_mode(&self, burst_mode: BurstTransfer) {
+    fn set_burst_mode(&self, burst_mode: BurstConfig) {
         let spi = self.0.register_block();
         spi.dma_conf()
             .modify(|_, w| w.out_data_burst_en().bit(burst_mode.is_burst_enabled()));
@@ -222,7 +222,7 @@ impl<C: PdmaChannel<RegisterBlock = SpiRegisterBlock>> RegisterAccess for SpiDma
         spi.dma_conf().modify(|_, w| w.in_rst().clear_bit());
     }
 
-    fn set_burst_mode(&self, _burst_mode: BurstTransfer) {}
+    fn set_burst_mode(&self, _burst_mode: BurstConfig) {}
 
     fn set_descr_burst_mode(&self, burst_mode: bool) {
         let spi = self.0.register_block();
@@ -480,7 +480,7 @@ impl<C: PdmaChannel<RegisterBlock = I2sRegisterBlock>> RegisterAccess for I2sDma
         reg_block.lc_conf().modify(|_, w| w.out_rst().clear_bit());
     }
 
-    fn set_burst_mode(&self, burst_mode: BurstTransfer) {
+    fn set_burst_mode(&self, burst_mode: BurstConfig) {
         let reg_block = self.0.register_block();
         reg_block
             .lc_conf()
@@ -659,7 +659,7 @@ impl<C: PdmaChannel<RegisterBlock = I2sRegisterBlock>> RegisterAccess for I2sDma
         reg_block.lc_conf().modify(|_, w| w.in_rst().clear_bit());
     }
 
-    fn set_burst_mode(&self, _burst_mode: BurstTransfer) {}
+    fn set_burst_mode(&self, _burst_mode: BurstConfig) {}
 
     fn set_descr_burst_mode(&self, burst_mode: bool) {
         let reg_block = self.0.register_block();