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Support ESP32S2 #12
Support ESP32S2 #12
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Looks good overall to me, thanks! Just a couple small changes I'd like to see before merging please.
- One small change in the
esp-hal-common/Cargo.toml
manifest (see review comment) - Could you update the CI workflow? Currently it is not building for the ESP32-S2, as it was not ready until now. You should just need to add the chip to the build matrix (case- and punctuation-sensitive):
-
strategy: matrix: chip: [esp32, esp32s2]
-
esp-hal-common/Cargo.toml
Outdated
esp32s2 = ["esp32s2_pac", "esp32s2_pac/rt", "xtensa-lx/esp32", "xtensa-lx-rt/esp32s2", "procmacros/rtc_slow", "single_core"] # FIXME | ||
esp32s3 = ["esp32s3_pac", "esp32s3_pac/rt", "xtensa-lx/esp32", "xtensa-lx-rt/esp32s3", "procmacros/rtc_slow", "dual_core"] # FIXME |
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These # FIXME
comments were originally referring to the xtensa-lx-rt
feature being applied, so these should be removed now to avoid further confusion.
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oh yes 🤦
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Perfect, thanks!
* Make I2S examples work on ESP32 * Remove logger init
…ect use [1/?] (#1196) * Remove the chip-specific HAL packages * Update some doc comments which were missed, fix build script for ESP32/S2 * Refactor/update `esp-hal-procmacros` * Create the `examples` package, add back all of the previously existing examples * Use `xtask` automation package for checking examples and documentation in CI * Combine the `rt-riscv` and `rt-xtensa` features into a single `rt` feature * Bump MSRV to 1.76.0 (shocking!) * Re-document the features for the HAL * No need to re-export the `riscv` package like this * Make clippy happy, improve CI clippy checks * Update `CHANGELOG.md` * riscv: zero bss Co-authored-by: Björn Quentin <bjoernQ@users.noreply.github.com> * Address a number of review comments * Correct pin number in `hello_rgb` example for ESP32-C3 * Address the remaining review comments * More small tweaks/improvements * Fix RMT examples (#11) * Fix RMT examples * Remove logger-init * Make I2S examples work on ESP32 (#12) * Make I2S examples work on ESP32 * Remove logger init * Fix the direct-vectoring examples on all RISCV chips (#10) * Update GPIOs for some examples... * Embassy timer example fixes (#13) * Switch to generic queue instead of integrated for all examples * changelog * Update GPIO in another example, make `rustfmt` happy * Fix ESP32-S2 PSRAM * Avoid UART0 and SPI flash pins (#15) * Avoid UART0 and SPI flash pins * Fix spi_eh1_device_loopback for non-ESP32 * Update examples/src/bin/gpio_interrupt.rs Co-authored-by: Juraj Sadel <jurajsadel@gmail.com> --------- Co-authored-by: Juraj Sadel <jurajsadel@gmail.com> --------- Co-authored-by: Scott Mabin <scott@mabez.dev> Co-authored-by: Björn Quentin <bjoernQ@users.noreply.github.com> Co-authored-by: bjoernQ <bjoern.quentin@mobile-j.de> Co-authored-by: Juraj Sadel <jurajsadel@gmail.com>
This adds support for ESP32S2 and includes two basic examples.