Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

ESP32(SPI): Disable the write side when reading is being done in DMA … #1894

Merged
merged 3 commits into from
Aug 7, 2024
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
1 change: 1 addition & 0 deletions esp-hal/CHANGELOG.md
Original file line number Diff line number Diff line change
Expand Up @@ -25,6 +25,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
- Fix I2S async-tx (#1833)
- Fix PARL_IO async-rx (#1851)
- SPI: Clear DMA interrupts before (not after) DMA starts (#1859)
- SPI: disable and re-enable MISO and MOSI in `start_transfer_dma`, `start_read_bytes_dma` and `start_write_bytes_dma` accordingly (#1894)

### Removed

Expand Down
15 changes: 15 additions & 0 deletions esp-hal/src/spi/master.rs
Original file line number Diff line number Diff line change
Expand Up @@ -2032,6 +2032,11 @@ where
tx.is_done();
rx.is_done();

// re-enable the MISO and MOSI
reg_block
.user()
.modify(|_, w| w.usr_miso().bit(true).usr_mosi().bit(true));

self.enable_dma();
self.update();

Expand Down Expand Up @@ -2082,6 +2087,11 @@ where

tx.is_done();

// disable MISO and re-enable MOSI
reg_block
.user()
.modify(|_, w| w.usr_miso().bit(false).usr_mosi().bit(true));

self.enable_dma();
self.update();

Expand Down Expand Up @@ -2113,6 +2123,11 @@ where

rx.is_done();

// re-enable MISO and disable MOSI
reg_block
.user()
.modify(|_, w| w.usr_miso().bit(true).usr_mosi().bit(false));

self.enable_dma();
self.update();

Expand Down