Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Fix typo in field name for TRACE peripheral on C6/H2 #190

Merged
merged 1 commit into from
Feb 5, 2024
Merged

Fix typo in field name for TRACE peripheral on C6/H2 #190

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
20 changes: 10 additions & 10 deletions esp32c6/src/trace/mem_start_addr.rs
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -2,24 +2,24 @@
pub type R = crate::R<MEM_START_ADDR_SPEC>;
#[doc = "Register `MEM_START_ADDR` writer"]
pub type W = crate::W<MEM_START_ADDR_SPEC>;
#[doc = "Field `MEM_STAET_ADDR` reader - The start address of trace memory"]
pub type MEM_STAET_ADDR_R = crate::FieldReader<u32>;
#[doc = "Field `MEM_STAET_ADDR` writer - The start address of trace memory"]
pub type MEM_STAET_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
#[doc = "Field `MEM_START_ADDR` reader - The start address of trace memory"]
pub type MEM_START_ADDR_R = crate::FieldReader<u32>;
#[doc = "Field `MEM_START_ADDR` writer - The start address of trace memory"]
pub type MEM_START_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
impl R {
#[doc = "Bits 0:31 - The start address of trace memory"]
#[inline(always)]
pub fn mem_staet_addr(&self) -> MEM_STAET_ADDR_R {
MEM_STAET_ADDR_R::new(self.bits)
pub fn mem_start_addr(&self) -> MEM_START_ADDR_R {
MEM_START_ADDR_R::new(self.bits)
}
}
#[cfg(feature = "impl-register-debug")]
impl core::fmt::Debug for R {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("MEM_START_ADDR")
.field(
"mem_staet_addr",
&format_args!("{}", self.mem_staet_addr().bits()),
"mem_start_addr",
&format_args!("{}", self.mem_start_addr().bits()),
)
.finish()
}
Expand All @@ -34,8 +34,8 @@ impl W {
#[doc = "Bits 0:31 - The start address of trace memory"]
#[inline(always)]
#[must_use]
pub fn mem_staet_addr(&mut self) -> MEM_STAET_ADDR_W<MEM_START_ADDR_SPEC> {
MEM_STAET_ADDR_W::new(self, 0)
pub fn mem_start_addr(&mut self) -> MEM_START_ADDR_W<MEM_START_ADDR_SPEC> {
MEM_START_ADDR_W::new(self, 0)
}
#[doc = r" Writes raw bits to the register."]
#[doc = r""]
Expand Down
6 changes: 6 additions & 0 deletions esp32c6/svd/patches/esp32c6.yaml
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -111,3 +111,9 @@ SHA:
dim: 16
dimIncrement: 0x4
size: 0x20

TRACE:
MEM_START_ADDR:
_modify:
MEM_STAET_ADDR:
name: MEM_START_ADDR
20 changes: 10 additions & 10 deletions esp32h2/src/trace/mem_start_addr.rs
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -2,24 +2,24 @@
pub type R = crate::R<MEM_START_ADDR_SPEC>;
#[doc = "Register `MEM_START_ADDR` writer"]
pub type W = crate::W<MEM_START_ADDR_SPEC>;
#[doc = "Field `MEM_STAET_ADDR` reader - The start address of trace memory"]
pub type MEM_STAET_ADDR_R = crate::FieldReader<u32>;
#[doc = "Field `MEM_STAET_ADDR` writer - The start address of trace memory"]
pub type MEM_STAET_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
#[doc = "Field `MEM_START_ADDR` reader - The start address of trace memory"]
pub type MEM_START_ADDR_R = crate::FieldReader<u32>;
#[doc = "Field `MEM_START_ADDR` writer - The start address of trace memory"]
pub type MEM_START_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
impl R {
#[doc = "Bits 0:31 - The start address of trace memory"]
#[inline(always)]
pub fn mem_staet_addr(&self) -> MEM_STAET_ADDR_R {
MEM_STAET_ADDR_R::new(self.bits)
pub fn mem_start_addr(&self) -> MEM_START_ADDR_R {
MEM_START_ADDR_R::new(self.bits)
}
}
#[cfg(feature = "impl-register-debug")]
impl core::fmt::Debug for R {
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
f.debug_struct("MEM_START_ADDR")
.field(
"mem_staet_addr",
&format_args!("{}", self.mem_staet_addr().bits()),
"mem_start_addr",
&format_args!("{}", self.mem_start_addr().bits()),
)
.finish()
}
Expand All @@ -34,8 +34,8 @@ impl W {
#[doc = "Bits 0:31 - The start address of trace memory"]
#[inline(always)]
#[must_use]
pub fn mem_staet_addr(&mut self) -> MEM_STAET_ADDR_W<MEM_START_ADDR_SPEC> {
MEM_STAET_ADDR_W::new(self, 0)
pub fn mem_start_addr(&mut self) -> MEM_START_ADDR_W<MEM_START_ADDR_SPEC> {
MEM_START_ADDR_W::new(self, 0)
}
#[doc = r" Writes raw bits to the register."]
#[doc = r""]
Expand Down
6 changes: 6 additions & 0 deletions esp32h2/svd/patches/esp32h2.yaml
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -123,3 +123,9 @@ SHA:
dim: 16
dimIncrement: 0x4
size: 0x20

TRACE:
MEM_START_ADDR:
_modify:
MEM_STAET_ADDR:
name: MEM_START_ADDR
Loading