Merge pull request #103 from ferrous-systems/ai_branding_schematics_v2

Changes to the book content:

book/src/01_intro.md

@@ -1,15 +1,33 @@
+<p style="text-align:center;"><img src="./assets/esp-logo-black.svg" width="50%"></p>
+
 # Introduction
 
+## Content of this material
+
 This is Ferrous Systems' *Embedded Rust on Espressif* training material. It is divided into two workshops: introductory and advanced. The introductory trail will introduce you to basics of embedded development and how to make the embedded board interact with the outside world - reacting to commands and sending sensor data.
 
 The advanced course takes it from there to dive deeper into topics like interrupt handling, low-level peripheral access and writing your own drivers.
 
-An [Espressif Rust Board](https://github.com/esp-rs/esp-rust-board) or [ESP32-C3-DevKitC-02](https://docs.espressif.com/projects/esp-idf/en/latest/esp32c3/hw-reference/esp32c3/user-guide-devkitc-02.html) (intro part only!) is mandatory for working with this book - emulators like QEMU are not supported. 
+You can join the [esp-rs community](https://matrix.to/#/#esp-rs:matrix.org) on Matrix for all technical questions and  issues! The community is open to everyone.
+
+## The board
+
+An [Espressif Rust Board](https://github.com/esp-rs/esp-rust-board) is mandatory[^note] for working with this book - emulators like QEMU are not supported. 
+
+
+The board design and images, pin layout and schematics can be also found in this repository.
+
 If you subscribed to one of the trainings, a board will be provided to you directly by Espressif.
 Some exercises also require wireless internet access.
 
+
+
 Our focus lies primarily on the [ESP32-C3](https://www.espressif.com/en/products/socs/esp32-c3) platform, a [RISC-V](https://riscv.org/) based microcontroller with strong IoT capabilities, facilitated by integrated Wi-Fi and Bluetooth 5 (LE) functionality as well as large RAM + flash size for sophisticated applications. A substantial amount of this course is also applicable for Xtensa the other architecture Espressif uses, in particular the [ESP32-S3](https://www.espressif.com/en/products/socs/esp32-s3). For low-level access the general principles apply as well, but actual hardware access will differ in various ways - refer to the technical reference manuals ([C3](https://www.espressif.com/sites/default/files/documentation/esp32-c3_technical_reference_manual_en.pdf), [S3](https://www.espressif.com/sites/default/files/documentation/esp32-s3_technical_reference_manual_en.pdf)) or [other available technical documents](https://www.espressif.com/en/support/documents/technical-documents)  as needed.
 
+
 ## Rust knowledge
 
 Basic Rust like [The Rust Book](https://doc.rust-lang.org/book/) Chapters 1 - 6, Chapter 4 Ownership does not need to be fully understood.  
+
+
+[^note]: It is possible to follow the intro part with [ESP32-C3-DevKitC-02](https://docs.espressif.com/projects/esp-idf/en/latest/esp32c3/hw-reference/esp32c3/user-guide-devkitc-02.html) but we do not recommend it. It is inherently easier to follow the training when using the same hardware.

book/src/04_3_0_i2c.md

@@ -31,5 +31,15 @@ To read three bytes from an EEPROM device, the sequence will be something like:
 | 15.  |                          | Data Byte from EEPROM Address + 2 |
 | 16.  | NAK (i.e. end-of-read)   |                                   |
 | 17.  | STOP                     |                                   |
+### I²C signal image
 
-TODO I2C signal image
+
+<p style="text-align:center;"><img src="./assets/I2C_data_transfer.svg" width="100%"></p>
+
+A sequence diagram of data transfer on the I²C bus:
+- S - Start condition
+- P - Stop condition
+- B<sub>1</sub> to B<sub>N</sub> - transferring of one bit
+- SDA changes are allowed when SCL is low (blue), otherwise there will be a start or stop condition generated. 
+
+[Source & more details: Wikipedia](https://en.wikipedia.org/wiki/I%C2%B2C).