refactored xt_disable_intterupts to accept level

due to the rsil requirement that the level be a constant, the method was moved into a macro
esp8266 · May 7, 2015 · 4643cd1 · 4643cd1
1 parent b5dd07a
commit 4643cd1
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diff --git a/hardware/esp8266com/esp8266/cores/esp8266/Arduino.h b/hardware/esp8266com/esp8266/cores/esp8266/Arduino.h
@@ -124,11 +124,17 @@ void timer1_write(uint32_t ticks); //maximum ticks 8388607
 void ets_intr_lock();
 void ets_intr_unlock();
 
-void xt_enable_interrupts();
-void xt_disable_interrupts();
+// level (0-15), 
+// level 15 will disable ALL interrupts, 
+// level 0 will disable most software interrupts
+//
+#define xt_disable_interrupts(state, level) __asm__ __volatile__("rsil %0," __STRINGIFY(level) "; esync; isync; dsync" : "=a" (state))
+#define xt_enable_interrupts(state)  __asm__ __volatile__("wsr %0,ps; esync" :: "a" (state) : "memory")
 
-#define interrupts() xt_enable_interrupts();
-#define noInterrupts() xt_disable_interrupts();
+extern uint32_t interruptsState;
+
+#define interrupts() xt_enable_interrupts(interruptsState)
+#define noInterrupts() xt_disable_interrupts(interruptsState, 15)
 
 #define clockCyclesPerMicrosecond() ( F_CPU / 1000000L )
 #define clockCyclesToMicroseconds(a) ( (a) / clockCyclesPerMicrosecond() )

diff --git a/hardware/esp8266com/esp8266/cores/esp8266/core_esp8266_wiring_digital.c b/hardware/esp8266com/esp8266/cores/esp8266/core_esp8266_wiring_digital.c
@@ -139,20 +139,8 @@ extern void __detachInterrupt(uint8_t pin) {
   }
 }
 
-static uint32_t interruptState = 0;
-
-void xt_disable_interrupts()
-{
-    __asm__ __volatile__("rsil %0,15":"=a" (interruptState));
-    __asm__("esync");
-    __asm__("isync");
-    __asm__("dsync");
-}
-void xt_enable_interrupts()
-{
-    __asm__ __volatile__("wsr %0,ps"::"a" (interruptState) : "memory");
-    __asm__("esync");
-}
+// stored state for the noInterrupts/interrupts methods
+uint32_t interruptsState = 0;
 
 void initPins() {
   //Disable UART interrupts