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Fix pre-SDK Cache_Read_Enable for PUYA flash #8658
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mhightower83
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Enable SPI_CS_SETUP for early ICACHE use
Fix pre-SDK Cache_Read_Enable for PUYA flash
Sep 2, 2022
Per testing, is this still a draft ? |
The approach has been tested; however, this PR with the approach has not been verified. Otherwise, it is ready. Also for umm_init, do you agree with the change back to using IRAM as default and ICACHE requiring the override? |
The SPI_CS_SETUP parameter has been observed set by RTOS SDK and NONOS SDK as part of flash init/configuration. It may be necessary for some flash chips to perform correctly with ICACHE hardware access. Turning on and leaving it on should be okay.
Some flash chips (PUYA) have some unknown requirements for running with early `Cache_Read_Enable`. They work fine after the SDK is started. For now, change umm_init to default to IRAM. Define UMM_INIT_USE_ICACHE to move to ICACHE and free up IRAM. Added some experimental code that may indirectly support PUYA. Note, until this issue is resolved, that HWDT Stack Dump is not going to work with PUYA flash.
This resolves the exception 0 issue with PUYA flash when using flash/ICACHE for umm_init and/or using HWDT Stack Dump.
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* Enable SPI_CS_SETUP for early ICACHE use The SPI_CS_SETUP parameter has been observed set by RTOS SDK and NONOS SDK as part of flash init/configuration. It may be necessary for some flash chips to perform correctly with ICACHE hardware access. Turning on and leaving it on should be okay. * Cleanup comment * Change umm_init to default to IRAM Some flash chips (PUYA) have some unknown requirements for running with early `Cache_Read_Enable`. They work fine after the SDK is started. For now, change umm_init to default to IRAM. Define UMM_INIT_USE_ICACHE to move to ICACHE and free up IRAM. Added some experimental code that may indirectly support PUYA. Note, until this issue is resolved, that HWDT Stack Dump is not going to work with PUYA flash. * typo * Finalize fix for PUYA flash and preSDK use of Cache_Read_Enable. This resolves the exception 0 issue with PUYA flash when using flash/ICACHE for umm_init and/or using HWDT Stack Dump.
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This resolves the exception 0 issue with PUYA flash during the pre-SDK context. This Issue showed when using flash/ICACHE for
umm_init
and/or usingHWDT
Stack Dump .The
SPI_CS_SETUP
parameter has been observed set in RTOS SDK and NONOS SDK as part of flash init/configuration. It may be necessary for some flash chips to perform correctly. Turning on and leaving it on should be okay.phy_get_bb_evm
is the key function, called fromfix_cache_bug
in the NONOS SDK. This addition resolves the exception 0 issue with PUYA Flash when earlyCache_Read_Enable
is used.Changed
umm_init
back to default in IRAM. DefineUMM_INIT_USE_ICACHE
to moveumm_init
to flash and free up IRAM. For the non-debug build, it frees 136 bytes of IRAM while increasing IROM by 224 bytes.Resolves #8657 (comment) (has PUYA flash)
Unable to recreate the problem with the PUYA P25Q80H flash chip on ESP-01S.
Updated to summarize current PR.