Merge branch 'feature/refactor_driver' into 'master'

refactor(driver): New toolchain can compile driver code See merge request sdk/ESP8266_NONOS_SDK!105
espressif · Feb 15, 2019 · 3b23f9d · 3b23f9d
2 parents 47b89e1 + 157404e
commit 3b23f9d
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Showing 24 changed files with 1,764 additions and 1,544 deletions.
diff --git a/driver_lib/Makefile b/driver_lib/Makefile
@@ -22,7 +22,7 @@ GEN_IMAGES= eagle.app.v6.out
 GEN_BINS= eagle.app.v6.bin
 SPECIAL_MKTARGETS=$(APP_MKTARGETS)
 SUBDIRS=    \
-	user
+    user
 
 endif # } PDIR
 
@@ -31,11 +31,11 @@ LDDIR = ../ld
 
 CCFLAGS += -Os
 
-TARGET_LDFLAGS =		\
-	-nostdlib		\
-	-Wl,-EL \
-	--longcalls \
-	--text-section-literals
+TARGET_LDFLAGS =        \
+    -nostdlib        \
+    -Wl,-EL \
+    --longcalls \
+    --text-section-literals
 
 ifeq ($(FLAVOR),debug)
     TARGET_LDFLAGS += -g -O2
@@ -46,33 +46,33 @@ ifeq ($(FLAVOR),release)
 endif
 
 COMPONENTS_eagle.app.v6 = \
-	user/libuser.a
+    user/libuser.a
 
 LINKFLAGS_eagle.app.v6 = \
-	-L../lib        \
-	-nostdlib	\
+    -L../lib        \
+    -nostdlib    \
     -T$(LD_FILE)   \
-	-Wl,--no-check-sections	\
-    -u call_user_start	\
-	-Wl,-static						\
-	-Wl,--start-group					\
-	-lc					\
-	-lgcc					\
-	-lhal					\
-	-lphy	\
-	-lpp	\
-	-lnet80211	\
-	-llwip	\
-	-lwpa	\
-	-lcrypto	\
-	-lmain	\
-	-ljson	\
-	-lssl	\
-	-lupgrade	\
-	-lsmartconfig \
-	-lairkiss\
-	$(DEP_LIBS_eagle.app.v6)					\
-	-Wl,--end-group
+    -Wl,--no-check-sections    \
+    -u call_user_start    \
+    -Wl,-static                        \
+    -Wl,--start-group                    \
+    -lc                    \
+    -lgcc                    \
+    -lhal                    \
+    -lphy    \
+    -lpp    \
+    -lnet80211    \
+    -llwip    \
+    -lwpa    \
+    -lcrypto    \
+    -lmain    \
+    -ljson    \
+    -lssl    \
+    -lupgrade    \
+    -lsmartconfig \
+    -lairkiss\
+    $(DEP_LIBS_eagle.app.v6)                    \
+    -Wl,--end-group
 
 DEPENDS_eagle.app.v6 = \
                 $(LD_FILE) \
@@ -86,21 +86,21 @@ DEPENDS_eagle.app.v6 = \
 #   for a subtree within the makefile rooted therein
 #
 
-#UNIVERSAL_TARGET_DEFINES =		\
+#UNIVERSAL_TARGET_DEFINES =        \
 
 # Other potential configuration flags include:
-#	-DTXRX_TXBUF_DEBUG
-#	-DTXRX_RXBUF_DEBUG
-#	-DWLAN_CONFIG_CCX
-CONFIGURATION_DEFINES =	-DICACHE_FLASH
-
-DEFINES +=				\
-	$(UNIVERSAL_TARGET_DEFINES)	\
-	$(CONFIGURATION_DEFINES)
-
-DDEFINES +=				\
-	$(UNIVERSAL_TARGET_DEFINES)	\
-	$(CONFIGURATION_DEFINES)
+#    -DTXRX_TXBUF_DEBUG
+#    -DTXRX_RXBUF_DEBUG
+#    -DWLAN_CONFIG_CCX
+CONFIGURATION_DEFINES =    -DICACHE_FLASH
+
+DEFINES +=                \
+    $(UNIVERSAL_TARGET_DEFINES)    \
+    $(CONFIGURATION_DEFINES)
+
+DDEFINES +=                \
+    $(UNIVERSAL_TARGET_DEFINES)    \
+    $(CONFIGURATION_DEFINES)
 
 
 #############################################################

diff --git a/driver_lib/driver/gpio16.c b/driver_lib/driver/gpio16.c
@@ -30,37 +30,37 @@ void ICACHE_FLASH_ATTR
 gpio16_output_conf(void)
 {
     WRITE_PERI_REG(PAD_XPD_DCDC_CONF,
-                   (READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | (uint32)0x1); 	// mux configuration for XPD_DCDC to output rtc_gpio0
+                   (READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | (uint32_t)0x1);     // mux configuration for XPD_DCDC to output rtc_gpio0
 
     WRITE_PERI_REG(RTC_GPIO_CONF,
-                   (READ_PERI_REG(RTC_GPIO_CONF) & (uint32)0xfffffffe) | (uint32)0x0);	//mux configuration for out enable
+                   (READ_PERI_REG(RTC_GPIO_CONF) & (uint32_t)0xfffffffe) | (uint32_t)0x0);    //mux configuration for out enable
 
     WRITE_PERI_REG(RTC_GPIO_ENABLE,
-                   (READ_PERI_REG(RTC_GPIO_ENABLE) & (uint32)0xfffffffe) | (uint32)0x1);	//out enable
+                   (READ_PERI_REG(RTC_GPIO_ENABLE) & (uint32_t)0xfffffffe) | (uint32_t)0x1);    //out enable
 }
 
 void ICACHE_FLASH_ATTR
-gpio16_output_set(uint8 value)
+gpio16_output_set(uint8_t value)
 {
     WRITE_PERI_REG(RTC_GPIO_OUT,
-                   (READ_PERI_REG(RTC_GPIO_OUT) & (uint32)0xfffffffe) | (uint32)(value & 1));
+                   (READ_PERI_REG(RTC_GPIO_OUT) & (uint32_t)0xfffffffe) | (uint32_t)(value & 1));
 }
 
 void ICACHE_FLASH_ATTR
 gpio16_input_conf(void)
 {
     WRITE_PERI_REG(PAD_XPD_DCDC_CONF,
-                   (READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | (uint32)0x1); 	// mux configuration for XPD_DCDC and rtc_gpio0 connection
+                   (READ_PERI_REG(PAD_XPD_DCDC_CONF) & 0xffffffbc) | (uint32_t)0x1);     // mux configuration for XPD_DCDC and rtc_gpio0 connection
 
     WRITE_PERI_REG(RTC_GPIO_CONF,
-                   (READ_PERI_REG(RTC_GPIO_CONF) & (uint32)0xfffffffe) | (uint32)0x0);	//mux configuration for out enable
+                   (READ_PERI_REG(RTC_GPIO_CONF) & (uint32_t)0xfffffffe) | (uint32_t)0x0);    //mux configuration for out enable
 
     WRITE_PERI_REG(RTC_GPIO_ENABLE,
-                   READ_PERI_REG(RTC_GPIO_ENABLE) & (uint32)0xfffffffe);	//out disable
+                   READ_PERI_REG(RTC_GPIO_ENABLE) & (uint32_t)0xfffffffe);    //out disable
 }
 
-uint8 ICACHE_FLASH_ATTR
+uint8_t ICACHE_FLASH_ATTR
 gpio16_input_get(void)
 {
-    return (uint8)(READ_PERI_REG(RTC_GPIO_IN_DATA) & 1);
+    return (uint8_t)(READ_PERI_REG(RTC_GPIO_IN_DATA) & 1);
 }
diff --git a/driver_lib/driver/hw_timer.c b/driver_lib/driver/hw_timer.c
@@ -25,6 +25,8 @@
 #include "ets_sys.h"
 #include "os_type.h"
 #include "osapi.h"
+#include "driver/hw_timer.h"
+
 
 #define US_TO_RTC_TIMER_TICKS(t)          \
     ((t) ?                                   \
@@ -34,37 +36,21 @@
      0)
 
 #define FRC1_ENABLE_TIMER  BIT7
-#define FRC1_AUTO_LOAD  BIT6
-
-//TIMER PREDIVED MODE
-typedef enum {
-    DIVDED_BY_1 = 0,		//timer clock
-    DIVDED_BY_16 = 4,	//divided by 16
-    DIVDED_BY_256 = 8,	//divided by 256
-} TIMER_PREDIVED_MODE;
-
-typedef enum {			//timer interrupt mode
-    TM_LEVEL_INT = 1,	// level interrupt
-    TM_EDGE_INT   = 0,	//edge interrupt
-} TIMER_INT_MODE;
+#define FRC1_AUTO_LOAD     BIT6
 
-typedef enum {
-    FRC1_SOURCE = 0,
-    NMI_SOURCE = 1,
-} FRC1_TIMER_SOURCE_TYPE;
 
 /******************************************************************************
 * FunctionName : hw_timer_arm
 * Description  : set a trigger timer delay for this timer.
-* Parameters   : uint32 val :
+* Parameters   : uint32_t val :
 in autoload mode
                         50 ~ 0x7fffff;  for FRC1 source.
                         100 ~ 0x7fffff;  for NMI source.
 in non autoload mode:
                         10 ~ 0x7fffff;
 * Returns      : NONE
 *******************************************************************************/
-void  hw_timer_arm(u32 val)
+void  hw_timer_arm(uint32_t val)
 {
     RTC_REG_WRITE(FRC1_LOAD_ADDRESS, US_TO_RTC_TIMER_TICKS(val));
 }
@@ -100,15 +86,15 @@ static void hw_timer_nmi_cb(void)
 * FunctionName : hw_timer_init
 * Description  : initilize the hardware isr timer
 * Parameters   :
-FRC1_TIMER_SOURCE_TYPE source_type:
+frc1_timer_source_type source_type:
                         FRC1_SOURCE,    timer use frc1 isr as isr source.
                         NMI_SOURCE,     timer use nmi isr as isr source.
-u8 req:
+uint8_t req:
                         0,  not autoload,
                         1,  autoload mode,
 * Returns      : NONE
 *******************************************************************************/
-void ICACHE_FLASH_ATTR hw_timer_init(FRC1_TIMER_SOURCE_TYPE source_type, u8 req)
+void ICACHE_FLASH_ATTR hw_timer_init(frc1_timer_source_type source_type, uint8_t req)
 {
     if (req == 1) {
         RTC_REG_WRITE(FRC1_CTRL_ADDRESS,
@@ -132,7 +118,7 @@ void ICACHE_FLASH_ATTR hw_timer_init(FRC1_TIMER_SOURCE_TYPE source_type, u8 req)
 #if 0
 void   hw_test_timer_cb(void)
 {
-    static uint16 j = 0;
+    static uint16_t j = 0;
     j++;
 
     if ((WDEV_NOW() - tick_now2) >= 1000000) {