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Fix ESP32-S2 peripheral register address range (GCC-335) #3

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Fix ESP32-S2 peripheral register address range (GCC-335) #3

wants to merge 1 commit into from

Commits on Jul 29, 2023

  1. Fix ESP32-S2 ULP-FSM periph. reg. address range 

    As per ESP32-S2 Technical Reference Manual (TRM) v1.1, Table 10
on page 48, and also also Figure 3-1 on page 110, the base address
for the peripheral registers on the ESP32-S2 is 0x3f408000 instead
of 0x3ff48000 (as it was on the original ESP32).

See also the include file in the ESP-IDF (at: https://github.com/espressif/esp-idf/blob/v5.0.2/components/soc/esp32s2/include/soc/reg_base.h#L31),
which also uses 0x3f408000 instead of 0x3ff48000.
    @wnienhaus
    wnienhaus committed Jul 29, 2023
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