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Merge branch 'fix/fix_modem_module_clock_missing_after_ota_v5.3' into…
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… 'release/v5.3'

fix(esp_system): deselect all modem modules lp clock source selection before clk initialization (v5.3)

See merge request espressif/esp-idf!34924
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Jiang Jiang Jian committed Dec 5, 2024
2 parents 4143156 + 00cd226 commit a24dc94
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Showing 7 changed files with 26 additions and 5 deletions.
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
Expand Down Expand Up @@ -107,9 +107,15 @@ void modem_clock_select_lp_clock_source(periph_module_t module, modem_clock_lpcl

/**
* @brief Disable lowpower clock source selection
* @param module modem module
*/
void modem_clock_deselect_lp_clock_source(periph_module_t module);

/**
* @brief Disable all modem module's lowpower clock source selection
*/
void modem_clock_deselect_all_module_lp_clock_source(void);

/**
* @brief Reset wifi mac
*/
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11 changes: 11 additions & 0 deletions components/esp_hw_support/modem_clock.c
Original file line number Diff line number Diff line change
Expand Up @@ -346,6 +346,17 @@ void IRAM_ATTR modem_clock_module_disable(periph_module_t module)
modem_clock_device_disable(MODEM_CLOCK_instance(), deps);
}

void modem_clock_deselect_all_module_lp_clock_source(void)
{
#if SOC_WIFI_SUPPORTED
modem_clock_hal_deselect_all_wifi_lpclk_source(MODEM_CLOCK_instance()->hal);
#endif
#if SOC_BT_SUPPORTED
modem_clock_hal_deselect_all_ble_rtc_timer_lpclk_source(MODEM_CLOCK_instance()->hal);
#endif
modem_clock_hal_deselect_all_coex_lpclk_source(MODEM_CLOCK_instance()->hal);
}

void modem_clock_select_lp_clock_source(periph_module_t module, modem_clock_lpclk_src_t src, uint32_t divider)
{
assert(IS_MODEM_MODULE(module));
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1 change: 1 addition & 0 deletions components/esp_system/port/soc/esp32c5/clk.c
Original file line number Diff line number Diff line change
Expand Up @@ -83,6 +83,7 @@ __attribute__((weak)) void esp_clk_init(void)
wdt_hal_write_protect_enable(&rtc_wdt_ctx);
#endif

modem_clock_deselect_all_module_lp_clock_source();
#if defined(CONFIG_RTC_CLK_SRC_EXT_CRYS)
select_rtc_slow_clk(SOC_RTC_SLOW_CLK_SRC_XTAL32K);
#elif defined(CONFIG_RTC_CLK_SRC_EXT_OSC)
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1 change: 1 addition & 0 deletions components/esp_system/port/soc/esp32c6/clk.c
Original file line number Diff line number Diff line change
Expand Up @@ -102,6 +102,7 @@ __attribute__((weak)) void esp_clk_init(void)
wdt_hal_write_protect_enable(&rtc_wdt_ctx);
#endif

modem_clock_deselect_all_module_lp_clock_source();
#if defined(CONFIG_RTC_CLK_SRC_EXT_CRYS)
select_rtc_slow_clk(SOC_RTC_SLOW_CLK_SRC_XTAL32K);
#elif defined(CONFIG_RTC_CLK_SRC_EXT_OSC)
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1 change: 1 addition & 0 deletions components/esp_system/port/soc/esp32c61/clk.c
Original file line number Diff line number Diff line change
Expand Up @@ -75,6 +75,7 @@ __attribute__((weak)) void esp_clk_init(void)
wdt_hal_write_protect_enable(&rtc_wdt_ctx);
#endif

modem_clock_deselect_all_module_lp_clock_source();
#if defined(CONFIG_RTC_CLK_SRC_EXT_CRYS)
select_rtc_slow_clk(SOC_RTC_SLOW_CLK_SRC_XTAL32K);
#elif defined(CONFIG_RTC_CLK_SRC_EXT_OSC)
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2 changes: 2 additions & 0 deletions components/esp_system/port/soc/esp32h2/clk.c
Original file line number Diff line number Diff line change
Expand Up @@ -43,6 +43,7 @@
#include "hal/temperature_sensor_ll.h"
#include "hal/usb_serial_jtag_ll.h"
#include "esp_private/periph_ctrl.h"
#include "esp_private/esp_modem_clock.h"
#include "esp_private/esp_clk.h"
#include "esp_private/esp_pmu.h"
#include "esp_rom_uart.h"
Expand Down Expand Up @@ -101,6 +102,7 @@ __attribute__((weak)) void esp_clk_init(void)
wdt_hal_write_protect_enable(&rtc_wdt_ctx);
#endif

modem_clock_deselect_all_module_lp_clock_source();
#if defined(CONFIG_RTC_CLK_SRC_EXT_CRYS)
select_rtc_slow_clk(SOC_RTC_SLOW_CLK_SRC_XTAL32K);
#elif defined(CONFIG_RTC_CLK_SRC_EXT_OSC)
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7 changes: 3 additions & 4 deletions examples/wifi/power_save/pytest_wifi_power_save.py
Original file line number Diff line number Diff line change
@@ -1,6 +1,5 @@
# SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
# SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
# SPDX-License-Identifier: Apache-2.0

import logging

import pexpect
Expand All @@ -9,7 +8,7 @@
from pytest_embedded import Dut

bad_event_str = [
'bcn_timout',
'bcn_timeout',
'm f probe req l',
'abort() was called',
'Guru Meditation Error',
Expand All @@ -31,7 +30,7 @@ def _run_test(dut: Dut) -> None:
pass

try:
dut.expect(r'got ip: (\d+\.\d+\.\d+\.\d+)[^\d]', timeout=20)
dut.expect(r'got ip: (\d+\.\d+\.\d+\.\d+)[^\d]', timeout=30)
log_after_got_ip = dut.expect(pexpect.TIMEOUT, timeout=10).decode()
if any(s in log_after_got_ip for s in bad_event_str):
logging.info('Abnormal connection log:')
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