v0.12.0-esp32-20240726
gerekon
released this
31 Jul 17:28
·
181 commits
to master
since this release
Features:
- target/espressif: Added base debugging support for ESP32-C5.
- target/esp32c5: Added flash support.
- target/esp32c6: Add LP core debugging support. Added special config file for debugging HP + LP cores as two HW threads.
- target/espressif: Added esp32p4 smp config.
- target/espressif: Added batch process for flash breakpoints. Now to set/clear flash breakpoints stub is loaded to target memory only once upon target resume/halt. This improves debugging speed significantly.
- flash/espressif: Added support to use stub which is built into target application binary, so there is no need to load it every time flash breakpoint needs to be set/clered. This improves debugging speed significantly.
- target/esp_riscv: Added
mideleg
,medeleg
,mie
andmip
regs to the esp32c6 and esp32h2 register list. - target/esp32p4: Enabled debug assist monitor support.
- target/esp_riscv: Added floating point registers to the register list.
- target/espressif: Add RISCV read only regs (
mvendorid
,marchid
,mimpid
,mhartid
) to the register list. - rtos/zephyr: Added thread awareness for esp32, esp32s3 and RISCV.
- target/espressif: The algorithm timeout has been decreased from 40 seconds to 3 seconds.
Bug fixes:
- rtos/freertos: Fixed ESP32-P4 reset after cleaning memory in FreeRTOS post reset handler.
- contrib/loaders: Fixed esp32s3 flash init sequence. This led to flash probe failure for octal flash chips IDF app is built w/o PSRAM support.
- rtos/FreeRTOS: Fixed unknown symbol read errors on Amazon FreeRTOS SMP version.
- target/espressif: Fixed apptrace init error on riscv chips. During apptrace init, reading invalid memory caused an issue on some riscv targets such as esp32c2 and esp32p4.
- target/espressif: Fix smp flash command handlers. They were not working properly for the 2nd core, leading an error when running the
appimage_offset
orstub_log
commands - loaders/esp: Fixed dynamic mmu page size issue. With the 2MB flash config, the stub flasher could not properly configure the Cache MMU, so mapping and flash breakpoints were not working.
- target/riscv: Fixed handling external reset in halted state. Previously it led to busy timeout errors.
- target/esp_riscv: Added pre-shutdown command to ensure that debug module is deactivated before exit.
- target/riscv: Increased dm idle_count by dtmcs.idle. Make OpenOCD using dtmcs.idle value to decide how long stay in RunTest/Idle state during dmi_scan.
- jtag/esp_usb_jtag: Re-init usb port when replug or hard reset detected. On Windows, libusb_reset() is not functional. Libusb prints the error AbortPipe (pipe address 02) failed: [22] The device does not recognize the command and returns with a success code. So, OpenOCD still thinks that the revive_device has been completed successfully. But still, continue to get write_error from the endpoint.
Other:
- Added win64 package