add buttons test

f4pga · Apr 21, 2022 · 62460f8 · 62460f8
1 parent abe0e73
commit 62460f8
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diff --git a/xc/xc7/tests/buttons/CMakeLists.txt b/xc/xc7/tests/buttons/CMakeLists.txt
@@ -159,3 +159,13 @@ add_vivado_target(
 # NAME buttons_marszx3_vivado
 # PARENT_NAME buttons_marszx3
 # )
+add_file_target(FILE buttons_ax7050.xdc)
+add_file_target(FILE buttons_ax7050.v SCANNER_TYPE verilog)
+add_fpga_target(
+ NAME buttons_ax7050
+ BOARD ax7050
+ SOURCES buttons_ax7050.v
+ INPUT_XDC_FILES buttons_ax7050.xdc
+ EXPLICIT_ADD_FILE_TARGET
+)
+
diff --git a/xc/xc7/tests/buttons/buttons_ax7050.v b/xc/xc7/tests/buttons/buttons_ax7050.v
@@ -0,0 +1,8 @@
+`timescale 1ns/1ps
+module top (
+
+ input wire [1:0] sw,
+ output wire [1:0] led,
+);
+ assign led = sw;
+endmodule
diff --git a/xc/xc7/tests/buttons/buttons_ax7050.xdc b/xc/xc7/tests/buttons/buttons_ax7050.xdc
@@ -0,0 +1,21 @@
+
+############## NET - IOSTANDARD ##################
+set_property CFGBVS VCCO [current_design]
+set_property CONFIG_VOLTAGE 3.3 [current_design]
+#############SPI Configurate Setting##################
+set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design] 
+set_property CONFIG_MODE SPIx4 [current_design] 
+set_property BITSTREAM.CONFIG.CONFIGRATE 50 [current_design] 
+set_property BITSTREAM.GENERAL.CRC Disable [current_design] 
+#############LED Setting###########################
+set_property PACKAGE_PIN H16 [get_ports {led[0]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {led[0]}]
+
+set_property PACKAGE_PIN G16 [get_ports {led[1]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {led[1]}]
+
+set_property PACKAGE_PIN M15 [get_ports {sw[0]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {sw[0]}]
+
+set_property PACKAGE_PIN L15 [get_ports {sw[1]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {sw[1]}]