add 047-hclk-ioi18-pips fuzzer

Signed-off-by: Hans Baier <hansfbaier@gmail.com>

fuzzers/047-hclk-ioi18-pips/Makefile

@@ -0,0 +1,53 @@
+# Copyright (C) 2017-2020 The Project X-Ray Authors.
+#
+# Use of this source code is governed by a ISC-style
+# license that can be found in the LICENSE file or at
+# https://opensource.org/licenses/ISC
+#
+# SPDX-License-Identifier: ISC
+export FUZDIR=$(shell pwd)
+PIP_TYPE?=hclk_ioi
+PIPLIST_TCL=$(FUZDIR)/hclk_ioi_pip_list.tcl
+TODO_RE=".*"
+# FIXME Modify fuzzer to solve PIPs that drive the BUFIO and BUFR from ILOGIC clock or through the IOI tile.
+EXCLUDE_RE=".*\.HCLK_IOI_((I2IOCLK)|(IDELAYCTRL))"
+
+MAKETODO_FLAGS= --sides "" --pip-type ${PIP_TYPE} --seg-type ${PIP_TYPE} --re $(TODO_RE) --exclude-re $(EXCLUDE_RE)
+N = 499
+
+SEGMATCH_FLAGS=-c 4 -m 4 -M 4
+SPECIMENS_DEPS=build/cmt_regions.csv
+A_PIPLIST=hclk_ioi.txt
+
+include ../pip_loop.mk
+
+build/segbits_hclk_ioi.rdb: $(SPECIMENS_OK)
+ ${XRAY_SEGMATCH} ${SEGMATCH_FLAGS} -o build/segbits_hclk_ioi.rdb \
+ $(shell find build -name segdata_hclk_ioi.txt)
+
+build/segbits_hclk_ioi.db: build/segbits_hclk_ioi.rdb
+ ${XRAY_DBFIXUP} --db-root build --zero-db bits.dbf \
+ --seg-fn-in build/segbits_hclk_ioi.rdb \
+ --seg-fn-out build/segbits_hclk_ioi.db
+
+ # Keep a copy to track iter progress
+ cp build/segbits_hclk_ioi.rdb build/$(ITER)/segbits_hclk_ioi.rdb
+
+
+ ${XRAY_MASKMERGE} build/mask_hclk_ioi.db \
+ $(shell find build -name segdata_hclk_ioi.txt)
+
+database: build/segbits_hclk_ioi.db
+ # Clobber existing .db to eliminate potential conflicts
+ cp ${XRAY_DATABASE_DIR}/${XRAY_DATABASE}/segbits*.db build/database/${XRAY_DATABASE}
+ XRAY_DATABASE_DIR=${FUZDIR}/build/database ${XRAY_MERGEDB} hclk_ioi build/segbits_hclk_ioi.db
+
+build/cmt_regions.csv: output_cmt.tcl
+ mkdir -p build
+ cd build/ && ${XRAY_VIVADO} -mode batch -source ${FUZDIR}/output_cmt.tcl
+
+pushdb: database
+ ${XRAY_MERGEDB} hclk_ioi build/segbits_hclk_ioi.db
+ ${XRAY_MERGEDB} mask_hclk_ioi build/mask_hclk_ioi.db
+
+.PHONY: database pushdb

fuzzers/047-hclk-ioi18-pips/README.md

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+# HCLK_IOI interconnect fuzzer
+
+Solves pips located within the HCLK_IOI switch box.

fuzzers/047-hclk-ioi18-pips/generate.py

@@ -0,0 +1,92 @@
+#!/usr/bin/env python3
+# -*- coding: utf-8 -*-
+#
+# Copyright (C) 2017-2020 The Project X-Ray Authors.
+#
+# Use of this source code is governed by a ISC-style
+# license that can be found in the LICENSE file or at
+# https://opensource.org/licenses/ISC
+#
+# SPDX-License-Identifier: ISC
+
+from prjxray.segmaker import Segmaker
+import os
+import os.path
+
+
+def bitfilter(frame, word):
+ if frame < 26:
+ return False
+ return True
+
+
+def main():
+ segmk = Segmaker("design.bits")
+
+ tiledata = {}
+ pipdata = {}
+ ignpip = set()
+ tile_ports = {}
+
+ with open(os.path.join(os.getenv('FUZDIR'), '..', 'piplist', 'build',
+ 'hclk_ioi', 'hclk_ioi.txt')) as f:
+ for l in f:
+ tile_type, dst, src = l.strip().split('.')
+ if tile_type not in pipdata:
+ pipdata[tile_type] = []
+ tile_ports[tile_type] = set()
+
+ pipdata[tile_type].append((src, dst))
+ tile_ports[tile_type].add(src)
+ tile_ports[tile_type].add(dst)
+
+ print("Loading tags from design.txt.")
+ with open("design.txt", "r") as f:
+ for line in f:
+ tile, pip, src, dst, pnum, pdir = line.split()
+
+ if not tile.startswith('HCLK_IOI_'):
+ continue
+
+ pip_prefix, _ = pip.split(".")
+ tile_from_pip, tile_type = pip_prefix.split('/')
+ assert tile == tile_from_pip
+ _, src = src.split("/")
+ _, dst = dst.split("/")
+ pnum = int(pnum)
+ pdir = int(pdir)
+
+ if tile not in tiledata:
+ tiledata[tile] = {
+ "type": tile_type,
+ "pips": set(),
+ "srcs": set(),
+ "dsts": set()
+ }
+
+ tiledata[tile]["pips"].add((src, dst))
+ tiledata[tile]["srcs"].add(src)
+ tiledata[tile]["dsts"].add(dst)
+
+ if pdir == 0:
+ tiledata[tile]["srcs"].add(dst)
+ tiledata[tile]["dsts"].add(src)
+
+ for tile, pips_srcs_dsts in tiledata.items():
+ tile_type = pips_srcs_dsts["type"]
+ pips = pips_srcs_dsts["pips"]
+
+ for src, dst in pipdata[tile_type]:
+ if (src, dst) in ignpip:
+ pass
+ elif (src, dst) in pips:
+ segmk.add_tile_tag(tile, "%s.%s" % (dst, src), 1)
+ elif dst not in tiledata[tile]["dsts"]:
+ segmk.add_tile_tag(tile, "%s.%s" % (dst, src), 0)
+
+ segmk.compile(bitfilter=bitfilter)
+ segmk.write()
+
+
+if __name__ == "__main__":
+ main()