Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

build(deps): bump third_party/yosys from 3ebc50d to f2c6894 #2083

Merged
merged 1 commit into from
Jan 7, 2023
Merged

build(deps): bump third_party/yosys from 3ebc50d to f2c6894 #2083

Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 1 addition & 1 deletion third_party/yosys
Open in desktop
Submodule yosys updated 91 files
+0 −6 .github/workflows/emcc.yml
+0 −6 .github/workflows/vs.yml
+9 −1 CHANGELOG
+3 −12 Makefile
+3 −36 README.md
+5 −9 guidelines/Checklists
+1 −1 guidelines/GettingStarted
+1 −1 kernel/driver.cc
+0 −92 kernel/register.cc
+0 −466 manual/APPNOTE_010_Verilog_to_BLIF.tex
+0 −1,070 manual/APPNOTE_011_Design_Investigation.tex
+0 −3 manual/APPNOTE_011_Design_Investigation/cmos.v
+0 −34 manual/APPNOTE_011_Design_Investigation/cmos_00.dot
+0 −23 manual/APPNOTE_011_Design_Investigation/cmos_01.dot
+0 −6 manual/APPNOTE_011_Design_Investigation/example.v
+0 −11 manual/APPNOTE_011_Design_Investigation/example.ys
+0 −23 manual/APPNOTE_011_Design_Investigation/example_00.dot
+0 −33 manual/APPNOTE_011_Design_Investigation/example_01.dot
+0 −20 manual/APPNOTE_011_Design_Investigation/example_02.dot
+0 −11 manual/APPNOTE_011_Design_Investigation/example_03.dot
+0 −8 manual/APPNOTE_011_Design_Investigation/foobaraddsub.v
+0 −23 manual/APPNOTE_011_Design_Investigation/make.sh
+0 −19 manual/APPNOTE_011_Design_Investigation/memdemo.v
+0 −138 manual/APPNOTE_011_Design_Investigation/memdemo_00.dot
+0 −29 manual/APPNOTE_011_Design_Investigation/memdemo_01.dot
+0 −4 manual/APPNOTE_011_Design_Investigation/primetest.v
+0 −39 manual/APPNOTE_011_Design_Investigation/splice.dot
+0 −10 manual/APPNOTE_011_Design_Investigation/splice.v
+0 −16 manual/APPNOTE_011_Design_Investigation/submod.ys
+0 −45 manual/APPNOTE_011_Design_Investigation/submod_00.dot
+0 −87 manual/APPNOTE_011_Design_Investigation/submod_01.dot
+0 −33 manual/APPNOTE_011_Design_Investigation/submod_02.dot
+0 −26 manual/APPNOTE_011_Design_Investigation/submod_03.dot
+0 −12 manual/APPNOTE_011_Design_Investigation/sumprod.v
+0 −18 manual/APPNOTE_011_Design_Investigation/sumprod_00.dot
+0 −15 manual/APPNOTE_011_Design_Investigation/sumprod_01.dot
+0 −5 manual/APPNOTE_011_Design_Investigation/sumprod_02.dot
+0 −11 manual/APPNOTE_011_Design_Investigation/sumprod_03.dot
+0 −11 manual/APPNOTE_011_Design_Investigation/sumprod_04.dot
+0 −15 manual/APPNOTE_011_Design_Investigation/sumprod_05.dot
+0 −435 manual/APPNOTE_012_Verilog_to_BTOR.tex
+0 −29 manual/CHAPTER_Appnotes.tex
+0 −145 manual/CHAPTER_Approach.tex
+0 −35 manual/CHAPTER_Auxlibs.tex
+0 −26 manual/CHAPTER_Auxprogs.tex
+0 −839 manual/CHAPTER_Basics.tex
+0 −1,007 manual/CHAPTER_CellLib.tex
+0 −209 manual/CHAPTER_Eval.tex
+0 −84 manual/CHAPTER_Eval/grep-it.sh
+0 −14 manual/CHAPTER_Eval/openmsp430.prj
+0 −1 manual/CHAPTER_Eval/openmsp430_ys.prj
+0 −37 manual/CHAPTER_Eval/or1200.prj
+0 −1 manual/CHAPTER_Eval/or1200_ys.prj
+0 −74 manual/CHAPTER_Eval/run-it.sh
+0 −2 manual/CHAPTER_Eval/settings.xst
+0 −98 manual/CHAPTER_Intro.tex
+0 −324 manual/CHAPTER_Optimize.tex
+0 −560 manual/CHAPTER_Overview.tex
+0 −27 manual/CHAPTER_Prog.tex
+0 −3 manual/CHAPTER_Prog/.gitignore
+0 −12 manual/CHAPTER_Prog/Makefile
+0 −130 manual/CHAPTER_Prog/stubnets.cc
+0 −8 manual/CHAPTER_Prog/test.v
+0 −289 manual/CHAPTER_StateOfTheArt.tex
+0 −12 manual/CHAPTER_StateOfTheArt/always01.v
+0 −14 manual/CHAPTER_StateOfTheArt/always01_pub.v
+0 −15 manual/CHAPTER_StateOfTheArt/always02.v
+0 −14 manual/CHAPTER_StateOfTheArt/always02_pub.v
+0 −23 manual/CHAPTER_StateOfTheArt/always03.v
+0 −16 manual/CHAPTER_StateOfTheArt/arrays01.v
+0 −67 manual/CHAPTER_StateOfTheArt/cmp_tbdata.c
+0 −20 manual/CHAPTER_StateOfTheArt/forgen01.v
+0 −30 manual/CHAPTER_StateOfTheArt/forgen02.v
+0 −20 manual/CHAPTER_StateOfTheArt/iverilog-0.8.7-buildfixes.patch
+0 −36 manual/CHAPTER_StateOfTheArt/mvsis-1.3.6-buildfixes.patch
+0 −1,139 manual/CHAPTER_StateOfTheArt/simlib_hana.v
+0 −224 manual/CHAPTER_StateOfTheArt/simlib_icarus.v
+0 −166 manual/CHAPTER_StateOfTheArt/simlib_yosys.v
+0 −113 manual/CHAPTER_StateOfTheArt/sis-1.3.6-buildfixes.patch
+0 −64 manual/CHAPTER_StateOfTheArt/synth.sh
+0 −55 manual/CHAPTER_StateOfTheArt/validate_tb.sh
+0 −102 manual/CHAPTER_Techmap.tex
+0 −299 manual/CHAPTER_TextRtlil.tex
+0 −854 manual/CHAPTER_Verilog.tex
+0 −22 manual/appnotes.sh
+0 −9,592 manual/command-reference-manual.tex
+0 −163 manual/literature.bib
+0 −59 manual/manual.sh
+0 −230 manual/manual.tex
+0 −134 manual/weblinks.bib
+2 −2 techlibs/nexus/brams_map.v