[ImportVerilog] Support for String Types, String Literals and Real Literals #41
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Co-authored-by: Fabian Schuiki <fabian@schuiki.ch> Co-authored-by: ShiZuoye <albertethon@163.com> Co-authored-by: hunterzju <hunter_ht@zju.edu.cn> Co-authored-by: Hailong Sun <hailong.sun@terapines.com> * [ImportVerilog] This PR is aimed at showing the features that Moore supports now. (llvm#26) * WIP: [ImportVerilog] Slang frontend integration * [ImportVerilog] Add some new types which are equivalent to PredefinedIntegerType in slang::ast. * [ImportVerilog] Add some new test cases to detect. * [ImportVerilog] Add support for the RealType that is equivalent to FloatingType from slang::ast namespace. * [ImportVerilog] Add some new test cases for RealType. * [ImportVerilog] Add support for the moore::UnpackedUnsizedDim and moore::UnpackedRangeDim * [ImportVerilog] Add some new test cases and adjust the order of CHECK-LABEL in this file. * Add support for the moore::UnpackedAssocDim and moore::UnpackedQueueDim. * Add some new test cases for UnpackedAssocDim and UnpackedQueueDim. * Adjust the order of test cases to pass FileCheck correctly. * [ImportVerilog] Add support for the NetType. * [ImportVerilog] Add new test cases for the NetType. * [ImportVerilog] Add support for the moore::EnumType, but there are no related test cases. * [ImportVerilog] Some unnecessary semicolons were removed. * [ImportVerilog] The handling of some IntTypes was deleted due to an earlier error and is now restored. * [ImportVerilog] Able to handle 32-bit assignment Op. * [ImportVerilog] Able to handle 32-bit assignment Op and handle single blocking assignment in always_comb block. * [ImportVerilog] About the definition of Moore::AlwaysCombOp. * [ImportVerilog] WIP:Can't handle cases where the right side of an AssignOp is a variable. * [ImportVerilog] Add support for the moore::AlwaysCombOp and a new file called Statement.cpp is created, which is used for slang statement conversion. * [ImportVerilog] Create a new file called Statement.cpp which is related to Slang statement conversion. * [ImportVerilog] Change break in the case statement to call mlir::emitError(). * [ImportVerilog] There are tweaks to the framework for handling expressions. Andadd new supported for the handling varibles and nets. * [ImportVerilog] Add a new file to handle expression specially. * [ImportVerilog] Add a new line at the end of Expression.cpp. * [ImportVerilog] Add a new line at the end of Expression.cpp. * [ImportVerilog] Tweak a little detail. * [ImportVerilog] Support continuous assignment, but rhs can not a variable. * [ImportVerilog] Add support for the moore::IfOp. * [ImportVerilog] Add two new files for slang statements and expressions conversion. And now can support conversion of the alwaysCombOp, initialOp, and ifOp. * Update CMakeLists.txt * Update MooreOps.cpp * Update Structure.cpp * Update Structure.cpp * [ImportVerilog] A lot of things, review the details at the framework branch. * [ImportVerilog] Add EqualityOp to handle four equal operator. * [ImportVerilog] Implement the body of the visitBinaryOp func for choosing which op will be used. * [ImportVerilog] Implement the body of the visitSignalEvent func. * [ImportVerilog] Add moore::IfOp and modify the type of AssignOp. * [ImportVerilog] Support the relational and shift operators and introduce the scf::IfOp. * [ImportVerilog] Add the moore::LogicalOp to handle four logical operators. * [ImportVerilog] About the unaryOp, binaryOp, netOp and conversionOp. And add the test.sv file for testing existing feature. * [ImportVerilog] Support AddOp, MulOp and improved assignment Op (llvm#27) * [ImportVerilog] add PCassignOp and fix test.sv Create pcassign op when expr is Procedural continuals assignment. Tweak `test.sv` to pass the FileCheck. Clean up unnecessary functions. * [ImportVerilog] Support AddOp and MulOp AddOp and MulOp support variadic operands. The element of operands should be same. WIP: Add procedure tests, add missing bail-on-error WIP: Remove lvalue/rvalue type distinction WIP: Clean up ops and make tests more focused WIP: Minor restructuring WIP: Improve cast op and add more tests WIP: Use visitor to handle expressions WIP: Remove unneeded conversion ops WIP: Make ConstantOp more strict, add verifiers and builders WIP: Refactor and add missing unary operators WIP: Add more dedicated binary ops, add wildcard eq/neq, refactor Squash: Drop MIR statements file Squash: Move concat op Squash: Update logical and, or, implication, equivalence Squash: Rework shift operations Squash: Remove MIR expressions file [ImportVerilog] Add Assignment operator (llvm#30) Add lvalueStack to handle lvalue in assignment operator like: += -= *= /= Co-authored-by: ShiZuoye <albertethon@163.com> [ImportVerilog] Support Loop Statement (llvm#34) * [ImportVerilog] Support whileOp Added support for WhileLoop and DoWhileLoop using scf::whileOp. * [ImportVerilog] Support forLoop Support forLoop by using scf::whileOp. Handle StatementBlockSymbol in Structure.cpp * [ImportVerilog] Support RepeatLoop * [NFC] Use Visitor to handle Statement * [ImportVerilog] Support foreachLoop * [ImportVerilog] Support foreachLoop foreachLoop generated nested `scf::whileOp` instead of `scf::forOp` now. Co-authored-by: ShiZuoye <albertethon@163.com> Squash: If test rearrangement Co-authored-by: ShiZuoye <albertethon@163.com>
tdp2110
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Mar 4, 2024
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Very cool! Do you rely on anything in the |
fabianschuiki
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I don't think I need anything specific from Edit: I will wait until this PR is merged. |
…al Literals Created an op inspired by FIRRTL to represent the string and real types. They are StringConstantOp and FConstantOp, respectively. Note that due to Slang treating realtime and real as equivalent, having realtime with an initializer - e.g., `realtime x = 1.23;`, will cause the equivalence checking on the variable op to fail. A simple lit test has been included to showcase the functionality of declaring a string with an initializer as well as a short, real with an initializer. realtime has no initialzier as there is no support for $realtime system call yet.
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Created an op inspired by FIRRTL to represent the string and real types. They are StringConstantOp and FConstantOp, respectively. Note that due to Slang treating realtime and real as equivalent, having realtime with an initializer - e.g.,
realtime x = 1.23;, will cause the equivalence checking on the variable op to fail.A lit tests have been updated to showcase the functionality of declaring a string with an initializer as well as a short and real with an initializer. The tests also highlight conversions involved.