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Clarify supported CPU models for CPU templates #5142

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Merged
merged 3 commits into from
Apr 9, 2025

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zulinx86
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@zulinx86 zulinx86 commented Apr 7, 2025

Changes

  • Clarify supported CPU models for CPU template

Reason

The existing CPU templates won't support Intel Sapphire Rapids. Before adding it, let's make the documentation description clearer around what CPU models are supported for each CPU template.

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  • This functionality cannot be added in rust-vmm.

@zulinx86 zulinx86 force-pushed the template_cleanup branch 6 times, most recently from bba8690 to 5144394 Compare April 7, 2025 11:11
@zulinx86 zulinx86 marked this pull request as ready for review April 7, 2025 11:14
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codecov bot commented Apr 7, 2025

Codecov Report

Attention: Patch coverage is 92.30769% with 3 lines in your changes missing coverage. Please review.

Project coverage is 83.02%. Comparing base (8ce1360) to head (c8848a4).
Report is 3 commits behind head on main.

Files with missing lines Patch % Lines
.../src/cpu_config/x86_64/static_cpu_templates/mod.rs 88.88% 2 Missing ⚠️
...c/vmm/src/cpu_config/x86_64/custom_cpu_template.rs 95.23% 1 Missing ⚠️
Additional details and impacted files
@@            Coverage Diff             @@
##             main    #5142      +/-   ##
==========================================
- Coverage   83.02%   83.02%   -0.01%     
==========================================
  Files         250      250              
  Lines       26911    26902       -9     
==========================================
- Hits        22344    22335       -9     
  Misses       4567     4567              
Flag Coverage Δ
5.10-c5n.metal 83.56% <84.61%> (+0.01%) ⬆️
5.10-m5n.metal 83.56% <84.61%> (+0.01%) ⬆️
5.10-m6a.metal 82.78% <69.23%> (+0.07%) ⬆️
5.10-m6g.metal 79.36% <ø> (ø)
5.10-m6i.metal 83.55% <84.61%> (+0.01%) ⬆️
5.10-m7a.metal-48xl 82.77% <64.10%> (?)
5.10-m7g.metal 79.36% <ø> (ø)
6.1-c5n.metal 83.61% <84.61%> (+0.02%) ⬆️
6.1-m5n.metal 83.60% <84.61%> (+0.01%) ⬆️
6.1-m6a.metal 82.83% <69.23%> (+0.07%) ⬆️
6.1-m6g.metal 79.36% <ø> (ø)
6.1-m6i.metal 83.59% <84.61%> (+0.01%) ⬆️
6.1-m7a.metal-48xl 82.82% <64.10%> (?)
6.1-m7g.metal 79.36% <ø> (ø)

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@zulinx86 zulinx86 marked this pull request as draft April 7, 2025 11:26
@zulinx86 zulinx86 force-pushed the template_cleanup branch 9 times, most recently from 7bf9340 to c31f7b2 Compare April 7, 2025 16:25
@zulinx86 zulinx86 marked this pull request as ready for review April 7, 2025 16:52
@zulinx86 zulinx86 added the Status: Awaiting review Indicates that a pull request is ready to be reviewed label Apr 7, 2025
@zulinx86 zulinx86 enabled auto-merge (rebase) April 7, 2025 16:52
@zulinx86 zulinx86 changed the title Clarify supported CPU models for CPU templates + CPU template-related tests cleanups Clarify supported CPU models for CPU templates Apr 7, 2025
@zulinx86 zulinx86 force-pushed the template_cleanup branch 8 times, most recently from 4cb2c03 to 9d2ff4a Compare April 9, 2025 05:46
roypat
roypat previously approved these changes Apr 9, 2025
zulinx86 added 3 commits April 9, 2025 06:24
Do CPU model check for static CPU templates in accordance with the doc
change in the prev commit.

Signed-off-by: Takahiro Itazuri <itazur@amazon.com>
We made it more specific which CPU models are supported by CPU
templates. Now we can remove unnecessary files for an integration test
that captures rdmsr values when CPU templates are applied.

Signed-off-by: Takahiro Itazuri <itazur@amazon.com>
At that time of creating the directory, there are only custom CPU
templates corresponding to static CPU templates. But now there is a CPU
template that doesn't have a corresponding static CPU template (i.e.
aarch64_with_sve_and_pac.json), there is no longer sense to name the
dir "static_cpu_templates".

Signed-off-by: Takahiro Itazuri <itazur@amazon.com>
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zulinx86 commented Apr 9, 2025

@roypat sorry. I needed to fix an integration test failure that sets C3 template unconditionally on Intel Sapphire Rapids.

@zulinx86 zulinx86 merged commit 98aa435 into firecracker-microvm:main Apr 9, 2025
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@zulinx86 zulinx86 deleted the template_cleanup branch April 9, 2025 10:51
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4 participants