Skip to content
View floAfentaki's full-sized avatar

Highlights

  • Pro

Block or report floAfentaki

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Pinned Loading

  1. VGA-controller-for-FPGA VGA-controller-for-FPGA Public

    Full synthesizable VGA controller using Verilog developed for XSA-3S1000 FPGA

    Verilog

  2. Digital-Communications Digital-Communications Public

    Matlab codes developed during the course of Digital Communications of Huffman Encoding, Uniform and Non-Uniform Quantizer and a M-PAM System.

    MATLAB

  3. PStat PStat Public

    In this project I used Python in order to download excel files from Hellenic Statistic Authority regarding tourism in Greece during 2011-2015 and represent some of the records with Graphs and csv f…

    Python 1

  4. Autonomous-Driving-and-V2X-Protocol Autonomous-Driving-and-V2X-Protocol Public

    This project was composed by literature research and based on Apollo Auto project during the University's course Design of Embedded Systems

  5. DecryptionMessageSystem DecryptionMessageSystem Public

    A simulated Decryption Message System using Verilog

    Verilog

  6. HarAnalyzer HarAnalyzer Public

    We have created a WEB site which Analyzes Har files. Some of the extra functionalities we have developed are a Login System, an IP resolver which depicts on a map the user's location and a depictio…

    JavaScript