Patch to fix issue with DreamSourceLab#430

fornellas · Sep 4, 2022 · 91e40de · 91e40de
1 parent 2e75444
commit 91e40de
Showing 1 changed file with 7 additions and 6 deletions.
diff --git a/libsigrokdecode4DSL/decoders/uart/pd.py b/libsigrokdecode4DSL/decoders/uart/pd.py
@@ -559,17 +559,18 @@ def decode(self):
                     cond_idle_idx[TX] = len(conds)
                     conds.append(idle_cond)
             (rx, tx) = self.wait(conds)
-            if cond_data_idx[RX] is not None and self.matched[cond_data_idx[RX]]:
+
+            if cond_data_idx[RX] is not None and (self.matched & (0b1 << cond_data_idx[RX])):
                 self.inspect_sample(RX, rx, inv[RX])
-            if cond_edge_idx[RX] is not None and self.matched[cond_edge_idx[RX]]:
+            if cond_edge_idx[RX] is not None and (self.matched & (0b1 << cond_edge_idx[RX])):
                 self.inspect_edge(RX, rx, inv[RX])
                 self.inspect_idle(RX, rx, inv[RX])
-            if cond_idle_idx[RX] is not None and self.matched[cond_idle_idx[RX]]:
+            if cond_idle_idx[RX] is not None and (self.matched & (0b1 << cond_idle_idx[RX])):
                 self.inspect_idle(RX, rx, inv[RX])
-            if cond_data_idx[TX] is not None and self.matched[cond_data_idx[TX]]:
+            if cond_data_idx[TX] is not None and (self.matched & (0b1 << cond_data_idx[TX])):
                 self.inspect_sample(TX, tx, inv[TX])
-            if cond_edge_idx[TX] is not None and self.matched[cond_edge_idx[TX]]:
+            if cond_edge_idx[TX] is not None and (self.matched & (0b1 << cond_edge_idx[TX])):
                 self.inspect_edge(TX, tx, inv[TX])
                 self.inspect_idle(TX, tx, inv[TX])
-            if cond_idle_idx[TX] is not None and self.matched[cond_idle_idx[TX]]:
+            if cond_idle_idx[TX] is not None and (self.matched & (0b1 << cond_idle_idx[TX])):
                 self.inspect_idle(TX, tx, inv[TX])