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Update cmac_krnl.sv #8

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haiyang3-98 wants to merge 1 commit into fpgasystems:vitis_2020_1 from haiyang3-98:patch-1

haiyang3-98 commented Jun 23, 2022

Don't know why you put 0 in sys_reset but clearly many logic and the cmac ip depend on this signal to be initialized


          Update cmac_krnl.sv

53692de

Don't know why you put 0 in reset but clearly many logic  and modules depend on this signal to be initialized

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