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dt-bindings: pinctrl: mt7988: create table of pins
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@frank-w
frank-w committed Oct 2, 2024
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Showing 1 changed file with 114 additions and 186 deletions.
300 changes: 114 additions & 186 deletions Documentation/devicetree/bindings/pinctrl/mediatek,mt7988-pinctrl.yaml
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Expand Up @@ -79,193 +79,121 @@ patternProperties:
The following table shows the effective values of "group", "function"
properties and chip pinout pins

groups function pins (in pin#)
groups function pins (in pin#)
---------------------------------------------------------------------
"watchdog" "watchdog" 0
"wifi_led" "led" 1, 2
"i2c" "i2c" 3, 4
"uart1_0" "uart" 7, 8, 9, 10
"uart1_rx_tx" "uart" 42, 43
"uart1_cts_rts" "uart" 44, 45
"pcie_clk" "pcie" 9
"pcie_wake" "pcie" 10
"spi1_0" "spi" 11, 12, 13, 14
"pwm1_1" "pwm" 20,
"pwm0" "pwm" 21,
"pwm1_0" "pwm" 22,
"snfi" "flash" 23, 24, 25, 26, 27, 28
"spi1_2" "spi" 29, 30, 31, 32
"emmc_45" "emmc" 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
32

"spi1_1" "spi" 23, 24, 25, 26
"uart1_2_rx_tx" "uart" 29, 30
"uart1_2_cts_rts" "uart" 31, 32
"uart1_1" "uart" 23, 24, 25, 26
"uart2_0_rx_tx" "uart" 29, 30
"uart2_0_cts_rts" "uart" 31, 32
"spi0" "spi" 33, 34, 35, 36
"spi0_wp_hold" "spi" 37, 38
"uart1_3_rx_tx" "uart" 35, 36
"uart1_3_cts_rts" "uart" 37, 38
"uart2_1" "uart" 33, 34, 35, 36
"spi1_3" "spi" 33, 34, 35, 36
"uart0" "uart" 39, 40
"pcie_pereset" "pcie" 41
"uart1" "uart" 42, 43, 44, 45
"uart2" "uart" 46, 47, 48, 49
"emmc_51" "emmc" 50, 51, 52, 53, 54, 55, 56, 57, 58, 59,
60, 61

"pcm" "audio" 62, 63, 64, 65
"i2s" "audio" 62, 63, 64, 65
"switch_int" "eth" 66
"mdc_mdio" "eth" 67
"wf_2g" "wifi" 74, 75, 76, 77, 78, 79, 80, 81, 82, 83
"wf_5g" "wifi" 91, 92, 93, 94, 95, 96, 97, 98, 99, 100
"wf_dbdc" "wifi" 74, 75, 76, 77, 78, 79, 80, 81, 82, 83,
84, 85
//mt7988:
/* jtag */
static int mt7988_tops_jtag0_0_pins[] = { 0, 1, 2, 3, 4 };
static int mt7988_wo0_jtag_pins[] = { 50, 51, 52, 53, 54 };
static int mt7988_wo1_jtag_pins[] = { 50, 51, 52, 53, 54 };
static int mt7988_wo2_jtag_pins[] = { 50, 51, 52, 53, 54 };
static int mt7988_jtag_pins[] = { 58, 59, 60, 61, 62 };
static int mt7988_tops_jtag0_1_pins[] = { 58, 59, 60, 61, 62 };
/* int_usxgmii */
static int mt7988_int_usxgmii_pins[] = { 2, 3 };
/* pwm */
static int mt7988_pwm0_pins[] = { 57 };
static int mt7988_pwm1_pins[] = { 21 };
static int mt7988_pwm2_pins[] = { 80 };
static int mt7988_pwm3_pins[] = { 81 };
static int mt7988_pwm4_pins[] = { 82 };
static int mt7988_pwm5_pins[] = { 83 };
static int mt7988_pwm6_pins[] = { 69 };
static int mt7988_pwm7_pins[] = { 70 };
/* dfd */
static int mt7988_dfd_pins[] = { 0, 1, 2, 3, 4 };
/* i2c */
static int mt7988_xfi_phy0_i2c0_pins[] = { 0, 1 };
static int mt7988_xfi_phy1_i2c0_pins[] = { 0, 1 };
static int mt7988_xfi_phy_pll_i2c0_pins[] = { 3, 4 };
static int mt7988_xfi_phy_pll_i2c1_pins[] = { 3, 4 };
static int mt7988_i2c0_0_pins[] = { 5, 6 };
static int mt7988_i2c1_sfp_pins[] = { 5, 6 };
static int mt7988_xfi_pextp_phy0_i2c_pins[] = { 5, 6 };
static int mt7988_xfi_pextp_phy1_i2c_pins[] = { 5, 6 };
static int mt7988_i2c0_1_pins[] = { 15, 16 };
static int mt7988_u30_phy_i2c0_pins[] = { 15, 16 };
static int mt7988_u32_phy_i2c0_pins[] = { 15, 16 };
static int mt7988_xfi_phy0_i2c1_pins[] = { 15, 16 };
static int mt7988_xfi_phy1_i2c1_pins[] = { 15, 16 };
static int mt7988_xfi_phy_pll_i2c2_pins[] = { 15, 16 };
static int mt7988_i2c1_0_pins[] = { 17, 18 };
static int mt7988_u30_phy_i2c1_pins[] = { 17, 18 };
static int mt7988_u32_phy_i2c1_pins[] = { 17, 18 };
static int mt7988_xfi_phy_pll_i2c3_pins[] = { 17, 18 };
static int mt7988_sgmii0_i2c_pins[] = { 17, 18 };
static int mt7988_sgmii1_i2c_pins[] = { 17, 18 };
static int mt7988_i2c1_2_pins[] = { 69, 70 };
static int mt7988_i2c2_0_pins[] = { 69, 70 };
static int mt7988_i2c2_1_pins[] = { 71, 72 };
/* eth */
static int mt7988_mdc_mdio0_pins[] = { 5, 6 };
static int mt7988_2p5g_ext_mdio_pins[] = { 28, 29 };
static int mt7988_gbe_ext_mdio_pins[] = { 30, 31 };
static int mt7988_mdc_mdio1_pins[] = { 69, 70 };
/* pcie */
static int mt7988_pcie_wake_n0_0_pins[] = { 7 };
static int mt7988_pcie_clk_req_n0_0_pins[] = { 8 };
static int mt7988_pcie_wake_n3_0_pins[] = { 9 };
static int mt7988_pcie_clk_req_n3_pins[] = { 10 };
static int mt7988_pcie_clk_req_n0_1_pins[] = { 10 };
static int mt7988_pcie_p0_phy_i2c_pins[] = { 7, 8 };
static int mt7988_pcie_p1_phy_i2c_pins[] = { 7, 8 };
static int mt7988_pcie_p3_phy_i2c_pins[] = { 9, 10 };
static int mt7988_pcie_p2_phy_i2c_pins[] = { 7, 8 };
static int mt7988_ckm_phy_i2c_pins[] = { 9, 10 };
static int mt7988_pcie_wake_n0_1_pins[] = { 13 };
static int mt7988_pcie_wake_n3_1_pins[] = { 14 };
static int mt7988_pcie_2l_0_pereset_pins[] = { 19 };
static int mt7988_pcie_1l_1_pereset_pins[] = { 20 };
static int mt7988_pcie_clk_req_n2_1_pins[] = { 63 };
static int mt7988_pcie_2l_1_pereset_pins[] = { 73 };
static int mt7988_pcie_1l_0_pereset_pins[] = { 74 };
static int mt7988_pcie_wake_n1_0_pins[] = { 75 };
static int mt7988_pcie_clk_req_n1_pins[] = { 76 };
static int mt7988_pcie_wake_n2_0_pins[] = { 77 };
static int mt7988_pcie_clk_req_n2_0_pins[] = { 78 };
static int mt7988_pcie_wake_n2_1_pins[] = { 79 };
/* pmic */
static int mt7988_pmic_pins[] = { 11 };
/* watchdog */
static int mt7988_watchdog_pins[] = { 12 };
/* spi */
static int mt7988_spi0_wp_hold_pins[] = { 22, 23 };
static int mt7988_spi0_pins[] = { 24, 25, 26, 27 };
static int mt7988_spi1_pins[] = { 28, 29, 30, 31 };
static int mt7988_spi2_pins[] = { 32, 33, 34, 35 };
static int mt7988_spi2_wp_hold_pins[] = { 36, 37 };
/* flash */
static int mt7988_snfi_pins[] = { 22, 23, 24, 25, 26, 27 };
static int mt7988_emmc_45_pins[] = { 21, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37};
static int mt7988_sdcard_pins[] = { 32, 33, 34, 35, 36, 37 };
static int mt7988_emmc_51_pins[] = { 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49 };

/* uart */
static int mt7988_uart2_pins[] = { 0, 1, 2, 3 };
static int mt7988_tops_uart0_0_pins[] = { 22, 23 };
static int mt7988_uart2_0_pins[] = { 28, 29, 30, 31 };
static int mt7988_uart1_0_pins[] = { 32, 33, 34, 35 };
static int mt7988_uart2_1_pins[] = { 32, 33, 34, 35 };
static int mt7988_net_wo0_uart_txd_0_pins[] = { 28 };
static int mt7988_net_wo1_uart_txd_0_pins[] = { 29 };
static int mt7988_net_wo2_uart_txd_0_pins[] = { 30 };
static int mt7988_tops_uart1_0_pins[] = { 28, 29 };
static int mt7988_tops_uart0_1_pins[] = { 30, 31 };
static int mt7988_tops_uart1_1_pins[] = { 36, 37 };
static int mt7988_uart0_pins[] = { 55, 56 };
static int mt7988_tops_uart0_2_pins[] = { 55, 56 };
static int mt7988_uart2_2_pins[] = { 50, 51, 52, 53 };
static int mt7988_uart1_1_pins[] = { 58, 59, 60, 61 };
static int mt7988_uart2_3_pins[] = { 58, 59, 60, 61 };
static int mt7988_uart1_2_pins[] = { 80, 81, 82, 83 };
static int mt7988_uart1_2_lite_pins[] = { 80, 81 };
static int mt7988_tops_uart1_2_pins[] = { 80, 81 };
static int mt7988_net_wo0_uart_txd_1_pins[] = { 80 };
static int mt7988_net_wo1_uart_txd_1_pins[] = { 81 };
static int mt7988_net_wo2_uart_txd_1_pins[] = { 82 };

/* udi */
static int mt7988_udi_pins[] = { 32, 33, 34, 35, 36 };

/* i2s */
static int mt7988_i2s_pins[] = { 50, 51, 52, 53, 54 };

/* pcm */
static int mt7988_pcm_pins[] = { 50, 51, 52, 53 };
/* led */
static int mt7988_gbe0_led1_pins[] = { 58 };
static int mt7988_gbe0_led1_funcs[] = { 6 };
static int mt7988_gbe1_led1_pins[] = { 59 };
static int mt7988_gbe1_led1_funcs[] = { 6 };
static int mt7988_gbe2_led1_pins[] = { 60 };
static int mt7988_gbe2_led1_funcs[] = { 6 };
static int mt7988_gbe3_led1_pins[] = { 61 };
static int mt7988_gbe3_led1_funcs[] = { 6 };
static int mt7988_2p5gbe_led1_pins[] = { 62 };
static int mt7988_gbe0_led0_pins[] = { 64 };
static int mt7988_gbe1_led0_pins[] = { 65 };
static int mt7988_gbe2_led0_pins[] = { 66 };
static int mt7988_gbe3_led0_pins[] = { 67 };

static int mt7988_2p5gbe_led0_pins[] = { 68 };

/* usb */
static int mt7988_drv_vbus_p1_pins[] = { 63 };
static int mt7988_drv_vbus_pins[] = { 79 };
"tops_jtag0_0" "jtag" 0, 1, 2, 3, 4
"wo0_jtag" "jtag" 50, 51, 52, 53, 54
"wo1_jtag" "jtag" 50, 51, 52, 53, 54
"wo2_jtag" "jtag" 50, 51, 52, 53, 54
"jtag" "jtag" 58, 59, 60, 61, 62
"tops_jtag0_1" "jtag" 58, 59, 60, 61, 62
"int_usxgmii" "int_usxgmii" 2, 3
"pwm0" "pwm" 57
"pwm1" "pwm" 21
"pwm2" "pwm" 80
"pwm3" "pwm" 81
"pwm4" "pwm" 82
"pwm5" "pwm" 83
"pwm6" "pwm" 69
"pwm7" "pwm" 70
"dfd" "dfd" 0, 1, 2, 3, 4
"xfi_phy0_i2c0" "i2c" 0, 1
"xfi_phy1_i2c0" "i2c" 0, 1
"xfi_phy_pll_i2c0" "i2c" 3, 4
"xfi_phy_pll_i2c1" "i2c" 3, 4
"i2c0_0" "i2c" 5, 6
"i2c1_sfp" "i2c" 5, 6
"xfi_pextp_phy0_i2c" "i2c" 5, 6
"xfi_pextp_phy1_i2c" "i2c" 5, 6
"i2c0_1" "i2c" 15, 16
"u30_phy_i2c0" "i2c" 15, 16
"u32_phy_i2c0" "i2c" 15, 16
"xfi_phy0_i2c1" "i2c" 15, 16
"xfi_phy1_i2c1" "i2c" 15, 16
"xfi_phy_pll_i2c2" "i2c" 15, 16
"i2c1_0" "i2c" 17, 18
"u30_phy_i2c1" "i2c" 17, 18
"u32_phy_i2c1" "i2c" 17, 18
"xfi_phy_pll_i2c3" "i2c" 17, 18
"sgmii0_i2c" "i2c" 17, 18
"sgmii1_i2c" "i2c" 17, 18
"i2c1_2" "i2c" 69, 70
"i2c2_0" "i2c" 69, 70
"i2c2_1" "i2c" 71, 72
"mdc_mdio0" "eth" 5, 6
"2p5g_ext_mdio" "eth" 28, 29
"gbe_ext_mdio" "eth" 30, 31
"mdc_mdio1" "eth" 69, 70
"pcie_wake_n0_0" "pcie" 7
"pcie_clk_req_n0_0" "pcie" 8
"pcie_wake_n3_0" "pcie" 9
"pcie_clk_req_n3" "pcie" 10
"pcie_clk_req_n0_1" "pcie" 10
"pcie_p0_phy_i2c" "pcie" 7, 8
"pcie_p1_phy_i2c" "pcie" 7, 8
"pcie_p3_phy_i2c" "pcie" 9, 10
"pcie_p2_phy_i2c" "pcie" 7, 8
"ckm_phy_i2c" "pcie" 9, 10
"pcie_wake_n0_1" "pcie" 13
"pcie_wake_n3_1" "pcie" 14
"pcie_2l_0_pereset" "pcie" 19
"pcie_1l_1_pereset" "pcie" 20
"pcie_clk_req_n2_1" "pcie" 63
"pcie_2l_1_pereset" "pcie" 73
"pcie_1l_0_pereset" "pcie" 74
"pcie_wake_n1_0" "pcie" 75
"pcie_clk_req_n1" "pcie" 76
"pcie_wake_n2_0" "pcie" 77
"pcie_clk_req_n2_0" "pcie" 78
"pcie_wake_n2_1" "pcie" 79
"pmic" "pmic" 11
"watchdog" "watchdog" 12
"spi0_wp_hold" "spi" 22, 23
"spi0" "spi" 24, 25, 26, 27
"spi1" "spi" 28, 29, 30, 31
"spi2" "spi" 32, 33, 34, 35
"spi2_wp_hold" "spi" 36, 37
"snfi" "flash" 22, 23, 24, 25, 26, 27
"emmc_45" "flash" 21, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37
"sdcard" "flash" 32, 33, 34, 35, 36, 37
"emmc_51" "flash" 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49
"uart2" "uart" 0, 1, 2, 3
"tops_uart0_0" "uart" 22, 23
"uart2_0" "uart" 28, 29, 30, 31
"uart1_0" "uart" 32, 33, 34, 35
"uart2_1" "uart" 32, 33, 34, 35
"net_wo0_uart_txd_0" "uart" 28
"net_wo1_uart_txd_0" "uart" 29
"net_wo2_uart_txd_0" "uart" 30
"tops_uart1_0" "uart" 28, 29
"tops_uart0_1" "uart" 30, 31
"tops_uart1_1" "uart" 36, 37
"uart0" "uart" 55, 56
"tops_uart0_2" "uart" 55, 56
"uart2_2" "uart" 50, 51, 52, 53
"uart1_1" "uart" 58, 59, 60, 61
"uart2_3" "uart" 58, 59, 60, 61
"uart1_2" "uart" 80, 81, 82, 83
"uart1_2_lite" "uart" 80, 81
"tops_uart1_2" "uart" 80, 81
"net_wo0_uart_txd_1" "uart" 80
"net_wo1_uart_txd_1" "uart" 81
"net_wo2_uart_txd_1" "uart" 82
"udi" "udi" 32, 33, 34, 35, 36
"i2s" "i2s" 50, 51, 52, 53, 54
"pcm" "pcm" 50, 51, 52, 53
"gbe0_led1" "led" 58
"gbe1_led1" "led" 59
"gbe2_led1" "led" 60
"gbe3_led1" "led" 61
"2p5gbe_led1" "led" 62
"gbe0_led0" "led" 64
"gbe1_led0" "led" 65
"gbe2_led0" "led" 66
"gbe3_led0" "led" 67
"2p5gbe_led0" "led" 68
"drv_vbus_p1" "usb" 63
"drv_vbus" "usb" 79


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