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4.14 hdmi #27

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merged 12 commits into from
Jun 10, 2018
Merged

4.14 hdmi #27

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dc927fb
Mediatek HDMI driver backported from 4.16 (for testing only)
d3adme4t May 28, 2018
4cbc5cb
HDMI-related updates: clocks, etc.
d3adme4t May 28, 2018
48fd143
Missed files added.
d3adme4t May 28, 2018
f47b036
mt7623n-bananapi-bpi-r2.dts modified
d3adme4t May 28, 2018
fef43d3
HDMI fixed, and works. mt2701-clk.h fixed.
d3adme4t May 30, 2018
7dcf594
Merge pull request #26 from d3adme4t/4.14-hdmi
frank-w May 31, 2018
5450e74
[defconfig] re-added wifi-driver
frank-w May 31, 2018
c691e43
[dts] re-added wifi-dts-nodes
frank-w May 31, 2018
fc1cf5d
[dts(i)] reverted to dts from 4.14-main and applied hdmi-changes from…
frank-w May 31, 2018
283a707
[defconfig] cleaned defconfig
frank-w May 31, 2018
8d246e9
fixed 2 warnings (3 left)
frank-w Jun 1, 2018
598b4a1
fixed the other 3 warnings
frank-w Jun 1, 2018
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248 changes: 106 additions & 142 deletions arch/arm/boot/dts/mt7623.dtsi
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97 changes: 75 additions & 22 deletions arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -123,6 +123,15 @@
};
};

&bls {
status = "okay";
port {
bls_out: endpoint {
remote-endpoint = <&dpi0_in>;
};
};
};

&cir {
pinctrl-names = "default";
pinctrl-0 = <&cir_pins_a>;
Expand Down Expand Up @@ -208,14 +217,49 @@
};
};

&hdmi0 {
&cec {
status = "okay";
};

&hdmi_phy {
mediatek,ibias = <0xa>;
mediatek,ibias_up = <0x1c>;
status = "okay";
};

&hdmiddc0 {
status = "okay";
};

&dpi0 {
status = "okay";
port {
dpi0_out: endpoint {
remote-endpoint = <&hdmi0_in>;
};

dpi0_in: endpoint@1 {
remote-endpoint = <&bls_out>;
};
};
};

&hdmi0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&hdmi_pin>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
hdmi0_in: endpoint {
remote-endpoint = <&dpi0_out>;
};
};
};
};

&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
Expand All @@ -228,11 +272,6 @@
status = "okay";
};

&mali {
vdd_g3d-supply = <&vdd_fixed_vgpu_reg>;
status = "okay";
};

&mmc0 {
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&mmc0_pins_default>;
Expand Down Expand Up @@ -289,6 +328,14 @@
};
};

hdmi_pin: htplg {
pins1 {
pinmux = <MT7623_PIN_123_HTPLG_FUNC_HTPLG>;
input-enable;
bias-pull-down;
};
};

i2c0_pins_a: i2c@0 {
pins_i2c0 {
pinmux = <MT7623_PIN_75_SDA0_FUNC_SDA0>,
Expand Down Expand Up @@ -345,6 +392,22 @@
};
};


mipi_dsi_pin: mipi_dsi_pin {
pins_cmd_dat {
pinmux = <MT7623_PIN_100_MIPI_TDP0_FUNC_TDP0>,
<MT7623_PIN_99_MIPI_TDN0_FUNC_TDN0>,
<MT7623_PIN_98_MIPI_TDP1_FUNC_TDP1>,
<MT7623_PIN_97_MIPI_TDN1_FUNC_TDN1>,
<MT7623_PIN_96_MIPI_TCP_FUNC_TCP>,
<MT7623_PIN_95_MIPI_TCN_FUNC_TCN>,
<MT7623_PIN_94_MIPI_TDP2_FUNC_TDP2>,
<MT7623_PIN_93_MIPI_TDN2_FUNC_TDN2>,
<MT7623_PIN_92_MIPI_TDP3_FUNC_TDP3>,
<MT7623_PIN_91_MIPI_TDN3_FUNC_TDN3>;
};
};

mmc0_pins_default: mmc0default {
pins_cmd_dat {
pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
Expand Down Expand Up @@ -448,6 +511,12 @@
};
};

pwm_bls_gpio: pwm_bls_gpio {
pins_cmd_dat {
pinmux = <MT7623_PIN_203_PWM0_FUNC_DISP_PWM>;
};
};

pcie_default: pcie_pin_default {
pins_cmd_dat {
pinmux = <MT7623_PIN_208_AUD_EXT_CK1_FUNC_PCIE0_PERST_N>,
Expand Down Expand Up @@ -515,17 +584,6 @@
};
};

mipi_dsi_pin: mipi_dsi_pin {
pins_cmd_dat {
pinmux = <MT7623_PIN_100_MIPI_TDP0_FUNC_TDP0>,
<MT7623_PIN_99_MIPI_TDN0_FUNC_TDN0>,
<MT7623_PIN_98_MIPI_TDP1_FUNC_TDP1>,
<MT7623_PIN_97_MIPI_TDN1_FUNC_TDN1>,
<MT7623_PIN_96_MIPI_TCP_FUNC_TCP>,
<MT7623_PIN_95_MIPI_TCN_FUNC_TCN>;
};

};
};

&pwm {
Expand Down Expand Up @@ -857,8 +915,3 @@
status = "okay";
};

&mipi_tx0 {
pinctrl-names = "default";
pinctrl-0 = <&mipi_dsi_pin>;
status = "okay";
};
24 changes: 15 additions & 9 deletions arch/arm/configs/mt7623n_evb_fwu_defconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -195,6 +195,10 @@ CONFIG_KEYBOARD_MATRIX=y
CONFIG_KEYBOARD_SAMSUNG=y
CONFIG_MOUSE_PS2_ELANTECH=y
CONFIG_MOUSE_PS2_SENTELIC=y
CONFIG_INPUT_MOUSEDEV=y
CONFIG_INPUT_MOUSEDEV_PSAUX=y
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
CONFIG_INPUT_TOUCHSCREEN=y
# CONFIG_SERIO_SERPORT is not set
CONFIG_VT_HW_CONSOLE_BINDING=y
Expand All @@ -215,6 +219,7 @@ CONFIG_MEDIATEK_WATCHDOG=y
CONFIG_MFD_MT6397=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_MT6323=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_MEDIA_SUPPORT=y
CONFIG_MEDIA_RC_SUPPORT=y
CONFIG_RC_DEVICES=y
Expand Down Expand Up @@ -386,15 +391,16 @@ CONFIG_THERMAL=m
CONFIG_MTK_THERMAL=m

#HDMI
##CONFIG_HDMI=y
#CONFIG_DRM=m
#CONFIG_DRM_MEDIATEK=m
#CONFIG_DRM_MEDIATEK_HDMI=m

#CONFIG_FB=y
#CONFIG_FB_CMDLINE=y
#CONFIG_FRAMEBUFFER_CONSOLE=y
#CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
CONFIG_DRM=y
CONFIG_DRM_ARM=y
CONFIG_DRM_MALI_DISPLAY=y
CONFIG_DRM_MEDIATEK=y
CONFIG_DRM_MEDIATEK_HDMI=y
CONFIG_COMMON_CLK_MT2701_MMSYS=y
CONFIG_COMMON_CLK_MT2701_IMGSYS=y
CONFIG_COMMON_CLK_MT2701_VDECSYS=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_DRM_FBDEV_EMULATION=y

#Sound
CONFIG_SOUND=y
Expand Down
8 changes: 6 additions & 2 deletions drivers/clk/mediatek/clk-mt2701.c
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Original file line number Diff line number Diff line change
Expand Up @@ -46,8 +46,6 @@ static const struct mtk_fixed_clk top_fixed_clks[] = {
340 * MHZ),
FIXED_CLK(CLK_TOP_HDMI_0_PLL340M, "hdmi_0_pll340m", "clk26m",
340 * MHZ),
FIXED_CLK(CLK_TOP_HDMITX_CLKDIG_CTS, "hdmitx_dig_cts", "clk26m",
300 * MHZ),
FIXED_CLK(CLK_TOP_HADDS2_FB, "hadds2_fbclk", "clk26m",
27 * MHZ),
FIXED_CLK(CLK_TOP_WBG_DIG_416M, "wbg_dig_ck_416m", "clk26m",
Expand Down Expand Up @@ -977,6 +975,10 @@ static const struct mtk_pll_data apmixed_plls[] = {
21, 0x2d0, 4, 0x0, 0x2d4, 0),
};

static const struct mtk_fixed_factor apmixed_fixed_divs[] = {
FACTOR(CLK_APMIXED_HDMI_REF, "hdmi_ref", "tvdpll", 1, 1),
};

static int mtk_apmixedsys_init(struct platform_device *pdev)
{
struct clk_onecell_data *clk_data;
Expand All @@ -988,6 +990,8 @@ static int mtk_apmixedsys_init(struct platform_device *pdev)

mtk_clk_register_plls(node, apmixed_plls, ARRAY_SIZE(apmixed_plls),
clk_data);
mtk_clk_register_factors(apmixed_fixed_divs, ARRAY_SIZE(apmixed_fixed_divs),
clk_data);

return of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
}
Expand Down
10 changes: 3 additions & 7 deletions drivers/clk/mediatek/clk-mtk.h
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Original file line number Diff line number Diff line change
Expand Up @@ -20,6 +20,7 @@
#include <linux/clk-provider.h>

struct clk;
struct clk_onecell_data;

#define MAX_MUX_GATE_BIT 31
#define INVALID_MUX_GATE_BIT (MAX_MUX_GATE_BIT + 1)
Expand Down Expand Up @@ -207,6 +208,8 @@ struct mtk_pll_data {
uint32_t en_mask;
uint32_t pd_reg;
uint32_t tuner_reg;
uint32_t tuner_en_reg;
uint8_t tuner_en_bit;
int pd_shift;
unsigned int flags;
const struct clk_ops *ops;
Expand All @@ -226,14 +229,7 @@ void mtk_clk_register_plls(struct device_node *node,
struct clk *mtk_clk_register_ref2usb_tx(const char *name,
const char *parent_name, void __iomem *reg);

#ifdef CONFIG_RESET_CONTROLLER
void mtk_register_reset_controller(struct device_node *np,
unsigned int num_regs, int regofs);
#else
static inline void mtk_register_reset_controller(struct device_node *np,
unsigned int num_regs, int regofs)
{
}
#endif

#endif /* __DRV_CLK_MTK_H */
13 changes: 11 additions & 2 deletions drivers/clk/mediatek/clk-pll.c
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Original file line number Diff line number Diff line change
Expand Up @@ -47,6 +47,7 @@ struct mtk_clk_pll {
void __iomem *pd_addr;
void __iomem *pwr_addr;
void __iomem *tuner_addr;
void __iomem *tuner_en_addr;
void __iomem *pcw_addr;
const struct mtk_pll_data *data;
};
Expand Down Expand Up @@ -227,7 +228,10 @@ static int mtk_pll_prepare(struct clk_hw *hw)
r |= pll->data->en_mask;
writel(r, pll->base_addr + REG_CON0);

if (pll->tuner_addr) {
if (pll->tuner_en_addr) {
r = readl(pll->tuner_en_addr) | BIT(pll->data->tuner_en_bit);
writel(r, pll->tuner_en_addr);
} else if (pll->tuner_addr) {
r = readl(pll->tuner_addr) | AUDPLL_TUNER_EN;
writel(r, pll->tuner_addr);
}
Expand All @@ -254,7 +258,10 @@ static void mtk_pll_unprepare(struct clk_hw *hw)
writel(r, pll->base_addr + REG_CON0);
}

if (pll->tuner_addr) {
if (pll->tuner_en_addr) {
r = readl(pll->tuner_en_addr) & ~BIT(pll->data->tuner_en_bit);
writel(r, pll->tuner_en_addr);
} else if (pll->tuner_addr) {
r = readl(pll->tuner_addr) & ~AUDPLL_TUNER_EN;
writel(r, pll->tuner_addr);
}
Expand Down Expand Up @@ -297,6 +304,8 @@ static struct clk *mtk_clk_register_pll(const struct mtk_pll_data *data,
pll->pcw_addr = base + data->pcw_reg;
if (data->tuner_reg)
pll->tuner_addr = base + data->tuner_reg;
if (data->tuner_en_reg)
pll->tuner_en_addr = base + data->tuner_en_reg;
pll->hw.init = &init;
pll->data = data;

Expand Down
2 changes: 1 addition & 1 deletion drivers/gpu/drm/drm_drv.c
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Original file line number Diff line number Diff line change
Expand Up @@ -724,7 +724,7 @@ static int create_compat_control_link(struct drm_device *dev)
* Old controlD chardev have been allocated in the range
* 64-127.
*/
name = kasprintf(GFP_KERNEL, "controlD%d", minor->index + 64);
name = kasprintf(GFP_KERNEL, "controlD%d", minor->index);
if (!name)
return -ENOMEM;

Expand Down
8 changes: 6 additions & 2 deletions drivers/gpu/drm/mediatek/Makefile
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Original file line number Diff line number Diff line change
Expand Up @@ -11,13 +11,17 @@ mediatek-drm-y := mtk_disp_color.o \
mtk_drm_plane.o \
mtk_dsi.o \
mtk_mipi_tx.o \
mtk_dpi.o
mtk_dpi.o \

mediatek-drm-$(CONFIG_DRM_FBDEV_EMULATION) += mtk_drm_fbdev.o

obj-$(CONFIG_DRM_MEDIATEK) += mediatek-drm.o

mediatek-drm-hdmi-objs := mtk_cec.o \
mtk_hdmi.o \
mtk_hdmi_ddc.o \
mtk_mt8173_hdmi_phy.o
mtk_mt2701_hdmi_phy.o \
mtk_mt8173_hdmi_phy.o \
mtk_hdmi_phy.o

obj-$(CONFIG_DRM_MEDIATEK_HDMI) += mediatek-drm-hdmi.o
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