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Merge patch series "arm: Add Analog Devices SC5xx Machine Type"
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Greg Malysa <greg.malysa@timesys.com> says:

This series adds support for the ADI SC5xx machine type and includes two
core drivers that are required for being able to boot any board--a UART
driver, the gptimer driver which is used as a clock reference (CNTVCNT
is not supported on the armv7 sc5xx SoCs) and the clock tree driver. Our
corresponding Linux support relies on u-boot configuring the clocks
correctly before booting, so it is not possible to boot any board
without the CGU/CDU configuration happening here. There are also no
board files, device trees, or defconfigs included here, but some common
definitions that will be used to build board files currently are. The
sc5xx SoCs themselves include many armv7 families (sc57x, sc58x, and
sc594) all using an ARM Cortex-A5, and one armv8 family (sc598) indended
to be a drop-in replacement for the SC594 in terms of peripherals, with
a Cortex-A55 instead.

Some of the configuration code in dmcinit and clkinit is quite scary and
causes a lot of checkpatch violations. It is modified from code
initially provided by ADI, but it has not been fully rewritten. There's
a question of how important it is to clean up this code--it has some
quality violations, but it has been in use (including in production) for
over two years and is known to work for performing the low level SoC
initialization, while a rewrite might introduce timing or sequence bugs
that could take a significant amount of time to detect in the future.
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trini committed May 8, 2024
2 parents 7e2938b + 8691ffa commit 1afa75c
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16 changes: 16 additions & 0 deletions MAINTAINERS
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Expand Up @@ -598,6 +598,22 @@ R: Marc Murphy <marc.murphy@sancloud.com>
S: Supported
F: arch/arm/dts/am335x-sancloud*

ARM SC5XX
M: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
M: Greg Malysa <greg.malysa@timesys.com>
M: Ian Roberts <ian.roberts@timesys.com>
M: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
M: Utsav Agarwal <utsav.agarwal@analog.com>
M: Arturs Artamonovs <arturs.artamonovs@analog.com>
S: Supported
T: git https://github.com/analogdevicesinc/lnxdsp-u-boot
F: arch/arm/include/asm/arch-adi/
F: arch/arm/mach-sc5xx/
F: drivers/clk/adi/
F: drivers/serial/serial_adi_uart4.c
F: drivers/timer/adi_sc5xx_timer.c
F: include/env/adi/

ARM SNAPDRAGON
M: Caleb Connolly <caleb.connolly@linaro.org>
M: Neil Armstrong <neil.armstrong@linaro.org>
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5 changes: 5 additions & 0 deletions arch/arm/Kconfig
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Expand Up @@ -1852,6 +1852,9 @@ config TARGET_LS1046AFRWY
development platform that supports the QorIQ LS1046A
Layerscape Architecture processor.

config ARCH_SC5XX
bool "Analog Devices SC5XX-processor family"

config TARGET_SL28
bool "Support sl28"
select ARCH_LS1028A
Expand Down Expand Up @@ -2285,6 +2288,8 @@ source "arch/arm/mach-rockchip/Kconfig"

source "arch/arm/mach-s5pc1xx/Kconfig"

source "arch/arm/mach-sc5xx/Kconfig"

source "arch/arm/mach-snapdragon/Kconfig"

source "arch/arm/mach-socfpga/Kconfig"
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1 change: 1 addition & 0 deletions arch/arm/Makefile
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Expand Up @@ -78,6 +78,7 @@ machine-$(CONFIG_ARCH_OWL) += owl
machine-$(CONFIG_ARCH_RENESAS) += renesas
machine-$(CONFIG_ARCH_ROCKCHIP) += rockchip
machine-$(CONFIG_ARCH_S5PC1XX) += s5pc1xx
machine-$(CONFIG_ARCH_SC5XX) += sc5xx
machine-$(CONFIG_ARCH_SNAPDRAGON) += snapdragon
machine-$(CONFIG_ARCH_SOCFPGA) += socfpga
machine-$(CONFIG_ARCH_STM32) += stm32
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39 changes: 39 additions & 0 deletions arch/arm/include/asm/arch-adi/sc5xx/sc5xx.h
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@@ -0,0 +1,39 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
* Written and/or maintained by Timesys Corporation
*
* Contact: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
* Contact: Greg Malysa <greg.malysa@timesys.com>
*/
#ifndef ARCH_ADI_SC5XX_SC5XX_H
#define ARCH_ADI_SC5XX_SC5XX_H

#include <linux/types.h>

#define TWI0_CLKDIV 0x31001400 // TWI0 SCL Clock Divider Register
#define TWI1_CLKDIV 0x31001500 // TWI1 SCL Clock Divider Register
#define TWI2_CLKDIV 0x31001600 // TWI2 SCL Clock Divider Register

const char *sc5xx_get_boot_mode(u32 *bmode);
void sc5xx_enable_rgmii(void);

void sc5xx_enable_ns_sharc_access(uintptr_t securec0_base);
void sc5xx_disable_spu0(uintptr_t spu0_start, uintptr_t spu0_end);
void sc5xx_enable_pmu(void);

/**
* Per-SoC init function to be used to initialize hw-specific things. Examples:
* enable PMU on armv7, enable coresight timer on armv8, etc.
*/
void sc5xx_soc_init(void);

/*
* Reconfigure SPI memory map region for OSPI use. The adi-spi3 driver
* does not use the memory map, while the OSPI driver requires it. Only
* available on sc59x and sc59x-64
*/
void sc59x_remap_ospi(void);

#endif
18 changes: 18 additions & 0 deletions arch/arm/include/asm/arch-adi/sc5xx/soc.h
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@@ -0,0 +1,18 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
* Written and/or maintained by Timesys Corporation
*
* Contact: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
* Contact: Greg Malysa <greg.malysa@timesys.com>
*/

#ifndef BOARD_ADI_COMMON_SOC_H
#define BOARD_ADI_COMMON_SOC_H

#include <phy.h>

void fixup_dp83867_phy(struct phy_device *phydev);

#endif
43 changes: 43 additions & 0 deletions arch/arm/include/asm/arch-adi/sc5xx/spl.h
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@@ -0,0 +1,43 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* (C) Copyright 2022 - Analog Devices, Inc.
*
* Written and/or maintained by Timesys Corporation
*
* Contact: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
* Contact: Greg Malysa <greg.malysa@timesys.com>
*/
#ifndef ARCH_ADI_SC5XX_SPL_H
#define ARCH_ADI_SC5XX_SPL_H

#include <linux/types.h>

struct adi_boot_args {
phys_addr_t addr;
u32 flags;
u32 cmd;
};

extern u32 bmode;

/**
* This table stores the arguments to the rom boot function per bootmode,
* and it is populated per SoC in the corresponding SoC support file (sc7x, sc58x,
* and so on).
*/
extern const struct adi_boot_args adi_rom_boot_args[8];

/**
* Struct layout for the boot config is also specific to an SoC, so you should
* only access it inside an SoC-specific boot hook function, which will be called
* from the boot rom while going from SPL to proper u-boot
*/
struct ADI_ROM_BOOT_CONFIG;
int32_t adi_rom_boot_hook(struct ADI_ROM_BOOT_CONFIG *cfg, int32_t cause);

typedef void (*adi_rom_boot_fn)(void *address, uint32_t flags, int32_t count,
void *hook, uint32_t command);

extern adi_rom_boot_fn adi_rom_boot;

#endif
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