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ram: Remove <common.h> and add needed includes
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Remove <common.h> from this driver directory and when needed
add missing include files directly.

Signed-off-by: Tom Rini <trini@konsulko.com>
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@trini
trini committed May 7, 2024
1 parent 37de718 commit 41b7743
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Showing 41 changed files with 22 additions and 40 deletions.
2 changes: 1 addition & 1 deletion drivers/ram/aspeed/sdram_ast2500.c
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* Copyright 2016 Google, Inc
*/

#include <common.h>
#include <config.h>
#include <clk.h>
#include <dm.h>
#include <errno.h>
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2 changes: 1 addition & 1 deletion drivers/ram/aspeed/sdram_ast2600.c
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/*
* Copyright (C) ASPEED Technology Inc.
*/
#include <common.h>
#include <config.h>
#include <clk.h>
#include <dm.h>
#include <errno.h>
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1 change: 0 additions & 1 deletion drivers/ram/bmips_ram.c
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* Copyright (C) 2009 Florian Fainelli <florian@openwrt.org>
*/

#include <common.h>
#include <dm.h>
#include <errno.h>
#include <init.h>
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1 change: 0 additions & 1 deletion drivers/ram/cadence/ddr_ctrl.c
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* bandwidth allocated to each AXI slave can be set.
*/

#include <common.h>
#include <linux/delay.h>
#include <linux/sizes.h>
#include <asm/io.h>
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1 change: 0 additions & 1 deletion drivers/ram/imxrt_sdram.c
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* Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
*/

#include <common.h>
#include <clk.h>
#include <dm.h>
#include <dm/device_compat.h>
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1 change: 0 additions & 1 deletion drivers/ram/k3-am654-ddrss.c
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* Lokesh Vutla <lokeshvutla@ti.com>
*/

#include <common.h>
#include <clk.h>
#include <dm.h>
#include <log.h>
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1 change: 0 additions & 1 deletion drivers/ram/k3-ddrss/k3-ddrss.c
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* Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
*/

#include <common.h>
#include <config.h>
#include <clk.h>
#include <div64.h>
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2 changes: 1 addition & 1 deletion drivers/ram/mediatek/ddr3-mt7629.c
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*/

#include <clk.h>
#include <common.h>
#include <config.h>
#include <dm.h>
#include <ram.h>
#include <asm/io.h>
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1 change: 0 additions & 1 deletion drivers/ram/mpc83xx_sdram.c
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* Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
*/

#include <common.h>
#include <dm.h>
#include <init.h>
#include <log.h>
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1 change: 0 additions & 1 deletion drivers/ram/ram-uclass.c
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#define LOG_CATEGORY UCLASS_RAM

#include <common.h>
#include <ram.h>
#include <dm.h>
#include <errno.h>
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1 change: 0 additions & 1 deletion drivers/ram/renesas/rzn1/ddr_async.c
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*
* Copyright (C) 2015 Renesas Electronics Europe Ltd
*/
#include <common.h>
#include <clk.h>
#include <dm.h>
#include <dm/device_compat.h>
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2 changes: 1 addition & 1 deletion drivers/ram/rockchip/dmc-rk3368.c
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* (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
*/

#include <common.h>
#include <config.h>
#include <clk.h>
#include <dm.h>
#include <hang.h>
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2 changes: 1 addition & 1 deletion drivers/ram/rockchip/sdram_common.c
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* (C) Copyright 2018 Rockchip Electronics Co., Ltd.
*/

#include <common.h>
#include <config.h>
#include <debug_uart.h>
#include <ram.h>
#include <asm/io.h>
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1 change: 0 additions & 1 deletion drivers/ram/rockchip/sdram_pctl_px30.c
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* (C) Copyright 2018 Rockchip Electronics Co., Ltd.
*/

#include <common.h>
#include <ram.h>
#include <asm/io.h>
#include <asm/arch-rockchip/sdram.h>
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1 change: 0 additions & 1 deletion drivers/ram/rockchip/sdram_phy_px30.c
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* (C) Copyright 2018 Rockchip Electronics Co., Ltd.
*/

#include <common.h>
#include <ram.h>
#include <asm/io.h>
#include <asm/arch-rockchip/sdram.h>
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2 changes: 1 addition & 1 deletion drivers/ram/rockchip/sdram_px30.c
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* (C) Copyright 2018 Rockchip Electronics Co., Ltd.
*/

#include <common.h>
#include <config.h>
#include <debug_uart.h>
#include <dm.h>
#include <init.h>
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2 changes: 1 addition & 1 deletion drivers/ram/rockchip/sdram_rk3066.c
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* Adapted from the very similar rk3188 ddr init.
*/

#include <common.h>
#include <config.h>
#include <clk.h>
#include <dm.h>
#include <dt-structs.h>
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2 changes: 1 addition & 1 deletion drivers/ram/rockchip/sdram_rk3128.c
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* (C) Copyright 2017 Rockchip Electronics Co., Ltd.
*/

#include <common.h>
#include <config.h>
#include <dm.h>
#include <log.h>
#include <ram.h>
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2 changes: 1 addition & 1 deletion drivers/ram/rockchip/sdram_rk3188.c
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* Adapted from the very similar rk3288 ddr init.
*/

#include <common.h>
#include <config.h>
#include <clk.h>
#include <dm.h>
#include <dt-structs.h>
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2 changes: 1 addition & 1 deletion drivers/ram/rockchip/sdram_rk322x.c
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/*
* (C) Copyright 2017 Rockchip Electronics Co., Ltd
*/
#include <common.h>
#include <config.h>
#include <clk.h>
#include <dm.h>
#include <dt-structs.h>
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2 changes: 1 addition & 1 deletion drivers/ram/rockchip/sdram_rk3288.c
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* Adapted from coreboot.
*/

#include <common.h>
#include <config.h>
#include <clk.h>
#include <dm.h>
#include <dt-structs.h>
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2 changes: 1 addition & 1 deletion drivers/ram/rockchip/sdram_rk3308.c
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* (C) Copyright 2019 Rockchip Electronics Co., Ltd.
*/

#include <common.h>
#include <config.h>
#include <dm.h>
#include <ram.h>
#include <syscon.h>
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2 changes: 1 addition & 1 deletion drivers/ram/rockchip/sdram_rk3328.c
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/*
* (C) Copyright 2017 Rockchip Electronics Co., Ltd.
*/
#include <common.h>
#include <config.h>
#include <clk.h>
#include <debug_uart.h>
#include <dm.h>
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2 changes: 1 addition & 1 deletion drivers/ram/rockchip/sdram_rk3399.c
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* Adapted from coreboot.
*/

#include <common.h>
#include <config.h>
#include <clk.h>
#include <dm.h>
#include <dt-structs.h>
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2 changes: 1 addition & 1 deletion drivers/ram/rockchip/sdram_rk3568.c
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* (C) Copyright 2021 Rockchip Electronics Co., Ltd.
*/

#include <common.h>
#include <config.h>
#include <dm.h>
#include <ram.h>
#include <syscon.h>
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2 changes: 1 addition & 1 deletion drivers/ram/rockchip/sdram_rk3588.c
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* (C) Copyright 2021 Rockchip Electronics Co., Ltd.
*/

#include <common.h>
#include <config.h>
#include <dm.h>
#include <ram.h>
#include <syscon.h>
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2 changes: 1 addition & 1 deletion drivers/ram/rockchip/sdram_rv1126.c
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* Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
*/

#include <common.h>
#include <config.h>
#include <debug_uart.h>
#include <dm.h>
#include <ram.h>
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1 change: 0 additions & 1 deletion drivers/ram/sandbox_ram.c
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* Written by Simon Glass <sjg@chromium.org>
*/

#include <common.h>
#include <dm.h>
#include <errno.h>
#include <ram.h>
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1 change: 0 additions & 1 deletion drivers/ram/sifive/sifive_ddr.c
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* Pragnesh Patel <pragnesh.patel@sifive.com>
*/

#include <common.h>
#include <dm.h>
#include <fdtdec.h>
#include <init.h>
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1 change: 0 additions & 1 deletion drivers/ram/starfive/ddrcsr_boot.c
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* Author: Yanhong Wang<yanhong.wang@starfivetech.com>
*/

#include <common.h>
#include <asm/io.h>
#include <asm/arch/regs.h>
#include <linux/delay.h>
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1 change: 0 additions & 1 deletion drivers/ram/starfive/ddrphy_start.c
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* Author: Yanhong Wang<yanhong.wang@starfivetech.com>
*/

#include <common.h>
#include <asm/io.h>

#include "starfive_ddr.h"
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2 changes: 1 addition & 1 deletion drivers/ram/starfive/ddrphy_train.c
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* Author: Yanhong Wang<yanhong.wang@starfivetech.com>
*/

#include <common.h>
#include <linux/kernel.h>
#include <asm/io.h>

static const u32 ddr_train_data[] = {
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2 changes: 1 addition & 1 deletion drivers/ram/starfive/ddrphy_utils.c
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* Author: Yanhong Wang<yanhong.wang@starfivetech.com>
*/

#include <common.h>
#include <linux/kernel.h>
#include <asm/io.h>

static const u32 ddr_phy_data[] = {
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1 change: 0 additions & 1 deletion drivers/ram/starfive/starfive_ddr.c
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* Author: Yanhong Wang<yanhong.wang@starfivetech.com>
*/

#include <common.h>
#include <asm/arch/regs.h>
#include <asm/io.h>
#include <clk.h>
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2 changes: 2 additions & 0 deletions drivers/ram/starfive/starfive_ddr.h
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#ifndef __STARFIVE_DDR_H__
#define __STARFIVE_DDR_H__

#include <linux/kernel.h>

#define SEC_CTRL_ADDR 0x1000
#define PHY_BASE_ADDR 0x800
#define PHY_AC_BASE_ADDR 0x1000
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1 change: 0 additions & 1 deletion drivers/ram/stm32_sdram.c
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#define LOG_CATEGORY UCLASS_RAM

#include <common.h>
#include <clk.h>
#include <dm.h>
#include <init.h>
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1 change: 0 additions & 1 deletion drivers/ram/stm32mp1/stm32mp1_ddr.c
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#define LOG_CATEGORY UCLASS_RAM

#include <common.h>
#include <clk.h>
#include <log.h>
#include <ram.h>
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1 change: 0 additions & 1 deletion drivers/ram/stm32mp1/stm32mp1_interactive.c
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#define LOG_CATEGORY UCLASS_RAM

#include <common.h>
#include <command.h>
#include <console.h>
#include <cli.h>
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1 change: 0 additions & 1 deletion drivers/ram/stm32mp1/stm32mp1_ram.c
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#define LOG_CATEGORY UCLASS_RAM

#include <common.h>
#include <clk.h>
#include <dm.h>
#include <init.h>
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1 change: 0 additions & 1 deletion drivers/ram/stm32mp1/stm32mp1_tests.c
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#define LOG_CATEGORY UCLASS_RAM

#include <common.h>
#include <console.h>
#include <init.h>
#include <log.h>
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2 changes: 1 addition & 1 deletion drivers/ram/sunxi/dram_sun20i_d1.c
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*/

#include <asm/io.h>
#include <common.h>
#include <config.h>
#ifdef CONFIG_RAM
#include <dm.h>
#include <ram.h>
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