Change the verilator generation code to call dut->eval() instead #252
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of dut->_eval_settle(dut->__VlSymsp) Test in SecondClockDrivesRegisterSpec will only work with this change. GCDSpec has code to do regression work to make sure the above change did not significantly slow the verilator simulation.
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of dut->_eval_settle(dut->__VlSymsp)
Test in SecondClockDrivesRegisterSpec will only work with this change.
GCDSpec has code to do regression work to make sure
the above change did not significantly slow the verilator simulation.