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smap.c
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smap.c
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/*
* PlayStation 2 Ethernet device driver
*
* Copyright (C) 2000-2002 Sony Computer Entertainment Inc.
* Copyright (C) 2010-2013 Jürgen Urban
*
* SPDX-License-Identifier: GPL-2.0
*/
#include <linux/kthread.h>
#include <linux/platform_device.h>
#include <asm/mach-ps2/iop-memory.h>
#include "smap.h"
#define DRV_NAME "smap"
#define INW(x) inw((uint32_t)(x))
#define OUTW(val, x) outw(val, (uint32_t)(x))
/*--------------------------------------------------------------------------*/
static void smap_skb_queue_init(struct smap_chan *smap, struct sk_buff_head *head);
static void smap_skb_enqueue(struct sk_buff_head *head, struct sk_buff *newsk);
static void smap_skb_requeue(struct sk_buff_head *head, struct sk_buff *newsk);
static struct sk_buff * smap_skb_dequeue(struct sk_buff_head *head);
static void smap_skb_queue_clear(struct smap_chan *smap, struct sk_buff_head *head);
static int smap_start_xmit(struct sk_buff *skb, struct net_device *net_dev);
static int smap_start_xmit2(struct smap_chan *smap);
static void smap_tx_intr(struct net_device *net_dev);
static void smap_rx_intr(struct net_device *net_dev);
static void smap_emac3_intr(struct net_device *net_dev);
static irqreturn_t smap_interrupt(int irq, void *dev_id);
static u_int8_t smap_bitrev(u_int8_t val);
static u_int32_t smap_crc32(u_int32_t crcval, u_int8_t cval);
static u_int32_t smap_calc_crc32(struct smap_chan *smap, u_int8_t *addr);
static int smap_store_new_mc_list(struct smap_chan *smap);
static void smap_multicast_list(struct net_device *net_dev);
static struct net_device_stats * smap_get_stats(struct net_device *net_dev);
static int smap_open(struct net_device *net_dev);
static int smap_close(struct net_device *net_dev);
static int smap_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd);
#ifdef HAVE_TX_TIMEOUT
static void smap_tx_timeout(struct net_device *net_dev);
static int smap_timeout_thread(void *arg);
#endif /* HAVE_TX_TIMEOUT */
static void smap_clear_all_interrupt(struct smap_chan *smap);
static void smap_interrupt_XXable(struct smap_chan *smap, int enable_flag);
static void smap_txrx_XXable(struct smap_chan *smap, int enable_flag);
static void smap_txbd_init(struct smap_chan *smap);
static void smap_rxbd_init(struct smap_chan *smap);
static int smap_fifo_reset(struct smap_chan *smap);
static void smap_reg_init(struct smap_chan *smap);
static int smap_emac3_soft_reset(struct smap_chan *smap);
static void smap_emac3_set_defvalue(struct smap_chan *smap);
static void smap_emac3_init(struct smap_chan *smap, int reset_only);
static void smap_emac3_re_init(struct smap_chan *smap);
static void smap_reset(struct smap_chan *smap, int reset_only);
static void smap_print_mac_address(struct smap_chan *smap, u_int8_t *addr);
static int smap_get_node_addr(struct smap_chan *smap);
static void smap_base_init(struct smap_chan *smap);
static void smap_dump_packet(struct smap_chan *smap, u_int8_t *ptr, int length);
static void smap_dump_txbd(struct smap_chan *smap);
static void smap_dump_rxbd(struct smap_chan *smap);
static void smap_dump_reg(struct smap_chan *smap);
static void smap_dump_emac3_reg(struct smap_chan *smap);
static void smap_dma_force_break(struct smap_chan *smap);
static void smap_rpcend_notify(void *arg);
static void smap_dma_setup(struct smap_chan *smap);
static void smap_run(struct smap_chan *smap);
static int smap_thread(void *arg);
/*--------------------------------------------------------------------------*/
static void
smap_skb_queue_init(struct smap_chan *smap, struct sk_buff_head *head)
{
unsigned long flags;
spin_lock_irqsave(&smap->spinlock, flags);
skb_queue_head_init(head);
spin_unlock_irqrestore(&smap->spinlock, flags);
return;
}
static void
smap_skb_enqueue(struct sk_buff_head *head, struct sk_buff *newsk)
{
skb_queue_tail(head, newsk);
return;
}
static void
smap_skb_requeue(struct sk_buff_head *head, struct sk_buff *newsk)
{
skb_queue_head(head, newsk);
return;
}
static struct sk_buff *
smap_skb_dequeue(struct sk_buff_head *head)
{
struct sk_buff *skb;
skb = skb_dequeue(head);
return(skb);
}
static void
smap_skb_queue_clear(struct smap_chan *smap, struct sk_buff_head *head)
{
struct sk_buff *skb;
unsigned long flags;
spin_lock_irqsave(&smap->spinlock, flags);
while (head->qlen) {
skb = smap_skb_dequeue(head);
if (skb)
dev_kfree_skb(skb);
}
spin_unlock_irqrestore(&smap->spinlock, flags);
return;
}
/*--------------------------------------------------------------------------*/
/* return value: 0 if success, !0 if error */
static int
smap_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
{
struct smap_chan *smap = netdev_priv(net_dev);
int qmax;
unsigned long flags;
spin_lock_irqsave(&smap->spinlock, flags);
if ((smap->flags & SMAP_F_LINKVALID) == 0) {
printk("%s: xmit: link not valid\n", net_dev->name);
spin_unlock_irqrestore(&smap->spinlock, flags);
return(-ENETDOWN);
}
qmax = (smap->flags & SMAP_F_DMA_TX_ENABLE) ? SMAP_BD_MAX_ENTRY/2 : 0;
if (smap->txqueue.qlen > qmax) {
netif_stop_queue(net_dev);
spin_unlock_irqrestore(&smap->spinlock, flags);
return(-EAGAIN);
}
smap_skb_enqueue(&smap->txqueue, skb);
wake_up_interruptible(&smap->wait_smaprun);
spin_unlock_irqrestore(&smap->spinlock, flags);
return(0);
}
static int
smap_start_xmit2(struct smap_chan *smap)
{
struct net_device *net_dev = smap->net_dev;
struct sk_buff *skb = NULL;
int retval;
int i, txlen;
int tx_re_q; /* re-queue and do again */
u_int16_t tmp_txbwp;
u_int32_t *datap;
volatile struct smapbd *txbd;
struct completion compl;
unsigned long flags;
tx_re_q = CLEAR;
tmp_txbwp = smap->txbwp;
smap->txdma_request.count = smap->txdma_request.size = 0;
for (i = 0; i < SMAP_DMA_ENTRIES; i++) {
skb = NULL;
if (((smap->flags & SMAP_F_DMA_TX_ENABLE) == 0) && (i > 0))
break;
spin_lock_irqsave(&smap->spinlock, flags);
skb = smap_skb_dequeue(&smap->txqueue);
spin_unlock_irqrestore(&smap->spinlock, flags);
if (skb == NULL)
break;
if (smap->txbdusedcnt + smap->txdma_request.count
>= (SMAP_BD_MAX_ENTRY-2)) {
printk("%s: xmit: txbd is full\n", net_dev->name);
tx_re_q |= (1 << i);
break;
}
/* check datalen and free buffer space */
/* txlen is multiple of 4 */
txlen = (skb->len + 3) & ~3;
if (smap->txdma_request.size + txlen > smap->txfreebufsize) {
tx_re_q |= (1 << i);
break;
}
if (smap->flags & SMAP_F_DMA_TX_ENABLE) {
memcpy((char *)(smap->txdma_ibuf + smap->txdma_request.size), skb->data, skb->len);
smap->txdma_request.sdd[i].i_addr =
(unsigned int)(smap->txdma_ibuf + smap->txdma_request.size);
} else {
smap->txdma_request.sdd[i].i_addr = 0;
}
smap->txdma_request.sdd[i].f_addr = (tmp_txbwp & 0x0FFC);
smap->txdma_request.sdd[i].size = txlen;
smap->txdma_request.sdd[i].sdd_misc = (unsigned int)skb;
smap->txdma_request.size += txlen;
smap->txdma_request.count++;
tmp_txbwp = SMAP_TXBUFBASE +
((tmp_txbwp + txlen - SMAP_TXBUFBASE)%SMAP_TXBUFSIZE);
}
if (tx_re_q && skb) {
spin_lock_irqsave(&smap->spinlock, flags);
smap_skb_requeue(&smap->txqueue, skb);
spin_unlock_irqrestore(&smap->spinlock, flags);
}
if (i == 0)
goto end;
if (smap->flags & SMAP_F_DMA_TX_ENABLE) {
init_completion(&compl);
ps2sif_writebackdcache((void *)smap->txdma_ibuf,
smap->txdma_request.size);
smap->txdma_request.command =
smap->txdma_request.sdd[0].f_addr; /*XXX*/
smap->txdma_request.devctrl = 0;
smap->dma_result = 0;
if (ps2sif_callrpc(&smap->cd_smap_tx, SIFNUM_SmapDmaWrite,
SIF_RPCM_NOWAIT,
(void *)&smap->txdma_request,
sizeof(int) * 4,
&smap->dma_result, sizeof(u_int32_t),
(ps2sif_endfunc_t)smap_rpcend_notify,
(void *)&compl) != 0) {
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s: xmit: callrpc failed, do pio to send this packet.pkt(%d)\n", net_dev->name,smap->txdma_request.count);
}
goto smappiosend;
}
wait_for_completion(&compl);
if (smap->dma_result != 0) {
printk("%s: xmit: dma break (%d)\n",
net_dev->name,smap->dma_result);
goto end;
}
} else {
smappiosend:
skb = (struct sk_buff *)smap->txdma_request.sdd[0].sdd_misc;
/* clear padding bytes */
*(int *)&smap->txbuf[skb->len & ~3] = 0;
memcpy(smap->txbuf, skb->data, skb->len);
spin_lock_irqsave(&smap->spinlock, flags);
/* send from memory to FIFO */
WRITE_SMAPREG16(smap,SMAP_TXFIFO_WR_PTR,
smap->txdma_request.sdd[0].f_addr);
datap = (u_int32_t *)smap->txbuf;
for (i = 0; i < smap->txdma_request.sdd[0].size; i += 4) {
/* memory -> FIFO */
WRITE_SMAPREG32(smap, SMAP_TXFIFO_DATA, *datap++);
}
spin_unlock_irqrestore(&smap->spinlock, flags);
/* re-queue unsend packets */
for (i = smap->txdma_request.count - 1; i > 0; i--) {
skb = (struct sk_buff *)smap->txdma_request.sdd[i].sdd_misc;
smap->txdma_request.sdd[i].sdd_misc = 0;
if (skb) {
spin_lock_irqsave(&smap->spinlock, flags);
smap_skb_requeue(&smap->txqueue, skb);
spin_unlock_irqrestore(&smap->spinlock, flags);
tx_re_q |= (1 << i);
}
}
smap->txdma_request.count = 1;
}
if (smap->flags & SMAP_F_PRINT_PKT) {
for (i = 0; i < smap->txdma_request.count; i++) {
skb = (struct sk_buff *)smap->txdma_request.sdd[i].sdd_misc;
printk("%s: xmit: mem->fifo done,len=%d,%d,ptr=0x%04x\n",
net_dev->name,skb->len,
smap->txdma_request.sdd[i].size,
smap->txdma_request.sdd[i].f_addr);
smap_dump_packet(smap, skb->data,
(skb->len < 60) ? skb->len: 60);
}
}
spin_lock_irqsave(&smap->spinlock, flags);
for (i = 0; i < smap->txdma_request.count; i++) {
txbd = &smap->txbd[smap->txbds];
skb = (struct sk_buff *)smap->txdma_request.sdd[i].sdd_misc;
smap->txfreebufsize -= smap->txdma_request.sdd[i].size;
/* send from FIFO to ethernet */
OUTW(skb->len, &txbd->length);
OUTW(SMAP_TXBUFBASE + smap->txdma_request.sdd[i].f_addr,
&txbd->pointer);
WRITE_SMAPREG8(smap,SMAP_TXFIFO_FRAME_INC, 1);
OUTW((SMAP_BD_TX_READY|SMAP_BD_TX_GENFCS|SMAP_BD_TX_GENPAD),
&txbd->ctrl_stat);
smap->txbdusedcnt++;
/* renew buffer descriptor */
SMAP_BD_NEXT(smap->txbds);
}
/* MULTI PACKET MODE */
EMAC3REG_WRITE(smap, SMAP_EMAC3_TxMODE0, E3_TX_GNP_0);
/* FIFO->ethernet */
if (smap->flags & SMAP_F_TXDNV_DISABLE) {
smap->flags &= ~SMAP_F_TXDNV_DISABLE;
WRITE_SMAPREG16(smap, SMAP_INTR_ENABLE, SMAPREG16(smap,
SMAP_INTR_ENABLE) | INTR_TXDNV);
WRITE_SMAPREG16(smap,SMAP_INTR_CLR, INTR_TXDNV);
}
spin_unlock_irqrestore(&smap->spinlock, flags);
/* renew write pointer */
if (smap->txdma_request.count > 0) {
i = smap->txdma_request.count - 1;
smap->txbwp = SMAP_TXBUFBASE +
((smap->txdma_request.sdd[i].f_addr + smap->txdma_request.sdd[i].size)%SMAP_TXBUFSIZE);
} else {
smap->txbwp = SMAP_TXBUFBASE;
}
netif_trans_update(net_dev); /* save the timestamp */
end:
for (i = 0; i < smap->txdma_request.count; i++) {
skb = (struct sk_buff *)smap->txdma_request.sdd[i].sdd_misc;
smap->txdma_request.sdd[i].sdd_misc = 0;
if (skb) {
dev_kfree_skb(skb);
}
}
spin_lock_irqsave(&smap->spinlock, flags);
if (tx_re_q || smap->txqueue.qlen > 0)
retval = -EAGAIN;
else
retval = 0;
spin_unlock_irqrestore(&smap->spinlock, flags);
return(retval);
}
/*--------------------------------------------------------------------------*/
static void
smap_tx_intr(struct net_device *net_dev)
{
struct smap_chan *smap = netdev_priv(net_dev);
volatile struct smapbd *txbd;
int txlen, error;
u_int16_t txstat;
unsigned long flags;
txbd = &smap->txbd[smap->txbdi];
txstat = INW(&txbd->ctrl_stat);
while (((txstat & SMAP_BD_TX_READY) == 0) && (smap->txbdusedcnt > 0)) {
if (smap->flags & SMAP_F_PRINT_PKT) {
printk("%s: tx intr: process packet,"
"[%d]=stat=0x%04x,len=%d,ptr=0x%04x\n",
net_dev->name,smap->txbdi,txstat,
INW(&txbd->length), INW(&txbd->pointer));
}
/* txlen is multiple of 4 */
txlen = (INW(&txbd->length) + 3) & ~3;
smap->txfreebufsize += txlen;
error = 0;
if (txstat & 0x7FFF) {
if (txstat & SMAP_BD_TX_BADFCS) {
error++;
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:tx intr: bad FCS\n", net_dev->name);
}
}
if (txstat & SMAP_BD_TX_BADPKT) {
error++;
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:tx intr: bad previous packet\n", net_dev->name);
}
}
if (txstat & SMAP_BD_TX_LOSSCR) {
error++;
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:tx intr: loss of carrier\n", net_dev->name);
}
}
if (txstat & SMAP_BD_TX_EDEFER) {
error++;
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:tx intr: excessive deferral\n", net_dev->name);
}
}
if (txstat & SMAP_BD_TX_ECOLL) {
error++;
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:tx intr: excessive collisions\n", net_dev->name);
}
}
if (txstat & SMAP_BD_TX_LCOLL) {
error++;
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:tx intr: late collision\n", net_dev->name);
}
}
if (txstat & SMAP_BD_TX_MCOLL) {
smap->net_stats.collisions++; /*XXX*/
}
if (txstat & SMAP_BD_TX_SCOLL) {
smap->net_stats.collisions++;
}
if (txstat & SMAP_BD_TX_UNDERRUN) {
error++;
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:tx intr: underrun\n", net_dev->name);
}
}
if (txstat & SMAP_BD_TX_SQE) {
error++;
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:tx intr: sqe test failed\n", net_dev->name);
}
}
if ((error > 0) && (smap->flags & SMAP_F_PRINT_MSG)) {
printk("%s:Tx intr: [%d]=stat(0x%04x, 0x%04x), len(%d, 0x%04x), ptr(0x%04x)\n", net_dev->name, smap->txbdi,txstat,INW(&txbd->ctrl_stat),INW(&txbd->length),INW(&txbd->length),INW(&txbd->pointer));
}
}
if (error == 0) {
smap->net_stats.tx_packets++;
smap->net_stats.tx_bytes += INW(&txbd->length);
} else {
smap->net_stats.tx_errors++;
}
smap->txbdusedcnt--;
#if 0
spin_lock_irqsave(&smap->spinlock, flags);
/* renew txbd */
OUTW(0, &txbd->length);
OUTW(0, &txbd->pointer);
OUTW(0, &txbd->ctrl_stat);
spin_unlock_irqrestore(&smap->spinlock, flags);
#endif
/* renew buffer descriptor */
SMAP_BD_NEXT(smap->txbdi);
txbd = &smap->txbd[smap->txbdi];
txstat = INW(&txbd->ctrl_stat);
}
if (smap->flags & SMAP_F_OPENED) {
netif_wake_queue(net_dev);
}
spin_lock_irqsave(&smap->spinlock, flags);
smap->txicnt--;
spin_unlock_irqrestore(&smap->spinlock, flags);
return;
}
static void
smap_rx_intr(struct net_device *net_dev)
{
struct smap_chan *smap = netdev_priv(net_dev);
volatile struct smapbd *rxbd;
u_int16_t rxstat;
int pkt_err, pioflag;
int pkt_len;
int i, rxlen;
u_int32_t *datap;
struct sk_buff *skb;
u_int8_t *rxbp;
int l_rxbdi;
int validrcvpkt, rcvpkt;
struct completion compl;
unsigned long flags;
pkt_err = pioflag = CLEAR;
validrcvpkt = rcvpkt = 0;
smap->rxdma_request.size = 0;
l_rxbdi = smap->rxbdi;
for (i = 0; i < SMAP_DMA_ENTRIES; i++) {
rxbd = &smap->rxbd[l_rxbdi];
rxstat = INW(&rxbd->ctrl_stat);
if (rxstat & SMAP_BD_RX_EMPTY)
break;
if (((smap->flags & SMAP_F_DMA_RX_ENABLE) == 0) && (i > 0))
break;
if (rxstat & 0x7FFF) {
if (rxstat & SMAP_BD_RX_OVERRUN) {
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:rx intr(%d): overrun\n", net_dev->name, i);
}
}
if (rxstat & SMAP_BD_RX_PFRM) {
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:rx intr(%d): pause frame\n", net_dev->name, i);
}
}
if (rxstat & SMAP_BD_RX_BADFRM) {
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:rx intr(%d): bad frame\n", net_dev->name, i);
}
}
if (rxstat & SMAP_BD_RX_RUNTFRM) {
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:rx intr(%d): runt frame\n", net_dev->name, i);
}
}
if (rxstat & SMAP_BD_RX_SHORTEVNT) {
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:rx intr(%d): short event\n", net_dev->name, i);
}
}
if (rxstat & SMAP_BD_RX_ALIGNERR) {
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:rx intr(%d): align error\n", net_dev->name, i);
}
}
if (rxstat & SMAP_BD_RX_BADFCS) {
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:rx intr(%d): bad FCS\n", net_dev->name, i);
}
}
if (rxstat & SMAP_BD_RX_FRMTOOLONG) {
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:rx intr(%d): frame too long\n", net_dev->name, i);
}
}
if (rxstat & SMAP_BD_RX_OUTRANGE) {
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:rx intr(%d): out range error\n", net_dev->name, i);
}
}
if (rxstat & SMAP_BD_RX_INRANGE) {
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:rx intr(%d): in range error\n", net_dev->name, i);
}
}
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:Rx intr(%d): [%d]=stat(0x%04x, 0x%04x), len(%d, 0x%04x), ptr(0x%04x)\n", net_dev->name, i, l_rxbdi, rxstat,INW(&rxbd->ctrl_stat),INW(&rxbd->length),INW(&rxbd->length),INW(&rxbd->pointer));
}
pkt_err |= (1 << i);
break;
}
pkt_len = INW(&rxbd->length);
if ((pkt_len < SMAP_RXMINSIZE) || (pkt_len > SMAP_RXMAXSIZE)) {
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:rx intr(%d): packet length error (%d)\n", net_dev->name, i, pkt_len);
}
pkt_err |= (1 << i);
break;
}
/* rxlen is multiple of 4 */
rxlen = (pkt_len + 3) & ~3;
if (smap->flags & SMAP_F_DMA_RX_ENABLE) {
smap->rxdma_request.sdd[i].i_addr =
(unsigned int)(smap->rxdma_ibuf+smap->rxdma_request.size);
} else {
smap->rxdma_request.sdd[i].i_addr = 0;
}
smap->rxdma_request.sdd[i].f_addr =
(unsigned int)(INW(&rxbd->pointer)&0x3FFC);
smap->rxdma_request.sdd[i].size = rxlen;
smap->rxdma_request.sdd[i].sdd_misc = pkt_len;
smap->rxdma_request.size += rxlen;
SMAP_BD_NEXT(l_rxbdi);
}
validrcvpkt = rcvpkt = i;
if (pkt_err)
rcvpkt++;
if (validrcvpkt == 0)
goto end;
if (smap->flags & SMAP_F_DMA_RX_ENABLE) {
init_completion(&compl);
ps2sif_writebackdcache((void *)smap->rxdma_ibuf,
smap->rxdma_request.size);
smap->rxdma_request.command =
smap->rxdma_request.sdd[0].f_addr; /*XXX*/
smap->rxdma_request.devctrl = 0;
smap->rxdma_request.count = validrcvpkt;
smap->dma_result = 0;
if (ps2sif_callrpc(&smap->cd_smap_rx,SIFNUM_SmapDmaRead,
SIF_RPCM_NOWAIT,
(void *)&smap->rxdma_request,
sizeof(int) * 4,
&smap->dma_result, sizeof(u_int32_t),
(ps2sif_endfunc_t)smap_rpcend_notify,
(void *)&compl) != 0) {
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:rx intr: callrpc failed, do pio to receive this packet.\n", net_dev->name);
}
goto smappiorecv;
}
wait_for_completion(&compl);
if (smap->dma_result != 0) {
printk("%s: recv: dma break (%d)\n",
net_dev->name,smap->dma_result);
goto end;
}
} else {
smappiorecv:
spin_lock_irqsave(&smap->spinlock, flags);
/* recv from FIFO to memory */
WRITE_SMAPREG16(smap,SMAP_RXFIFO_RD_PTR,
(u_int16_t)smap->rxdma_request.sdd[0].f_addr);
datap = (u_int32_t *)smap->rxbuf;
rxlen = smap->rxdma_request.sdd[0].size;
for (i = 0; i < rxlen; i += 4) { /* FIFO -> memory */
*datap++ = SMAPREG32(smap,SMAP_RXFIFO_DATA);
}
spin_unlock_irqrestore(&smap->spinlock, flags);
pkt_err = CLEAR;
pioflag = SET;
validrcvpkt = rcvpkt = 1;
}
if (smap->flags & SMAP_F_PRINT_PKT) {
l_rxbdi = smap->rxbdi;
for (i = 0; i < validrcvpkt; i++) {
rxbd = &smap->rxbd[l_rxbdi];
printk("%s: rx: fifo->mem done,"
"[%d]=stat=0x%04x,len=%d,ptr=0x%04x\n",
net_dev->name,l_rxbdi,INW(&rxbd->ctrl_stat),
INW(&rxbd->length),INW(&rxbd->pointer));
if (pioflag) {
rxbp = smap->rxbuf;
} else {
rxbp = (u_int8_t *)(smap->rxdma_request.sdd[i].i_addr);
}
smap_dump_packet(smap, rxbp, (INW(&rxbd->length) < 60) ? INW(&rxbd->length) : 60);
SMAP_BD_NEXT(l_rxbdi);
}
}
for (i = 0; i < rcvpkt; i++) {
if (pkt_err & (1 << i))
continue;
if (pioflag) {
rxbp = smap->rxbuf;
} else {
rxbp = (u_int8_t *)(smap->rxdma_request.sdd[i].i_addr);
}
pkt_len = smap->rxdma_request.sdd[i].sdd_misc;
skb = netdev_alloc_skb(net_dev, pkt_len + 2);
if (skb == NULL) {
printk("%s:rx intr(%d): skb alloc error\n",
net_dev->name, i);
break;
}
skb_reserve(skb, 2); /* 16 byte align the data fields */
skb_copy_to_linear_data(skb, rxbp, pkt_len);
skb_put(skb, pkt_len);
skb->dev = net_dev;
skb->protocol = eth_type_trans(skb, net_dev);
netif_rx(skb);
}
end:
spin_lock_irqsave(&smap->spinlock, flags);
rxbd = &smap->rxbd[smap->rxbdi];
for (i = 0; i < rcvpkt; i++) {
WRITE_SMAPREG8(smap,SMAP_RXFIFO_FRAME_DEC, 1);
if (pkt_err & (1 << i)) {
smap->net_stats.rx_errors++;
} else {
smap->net_stats.rx_packets++;
smap->net_stats.rx_bytes += smap->rxdma_request.sdd[i].sdd_misc;
}
/* renew rxbd */
#if 0
OUTW(0, &rxbd->length);
OUTW(0, &rxbd->pointer);
#endif
OUTW(SMAP_BD_RX_EMPTY, &rxbd->ctrl_stat);
/* renew buffer descriptor */
SMAP_BD_NEXT(smap->rxbdi);
rxbd = &smap->rxbd[smap->rxbdi];
}
if ((smap->flags & SMAP_F_RXDNV_DISABLE) && (rcvpkt > 0)) {
smap->flags &= ~SMAP_F_RXDNV_DISABLE;
WRITE_SMAPREG16(smap, SMAP_INTR_ENABLE,
SMAPREG16(smap,SMAP_INTR_ENABLE) | INTR_RXDNV);
WRITE_SMAPREG16(smap, SMAP_INTR_CLR, INTR_RXDNV);
}
smap->rxicnt--;
spin_unlock_irqrestore(&smap->spinlock, flags);
return;
}
static void
smap_emac3_intr(struct net_device *net_dev)
{
struct smap_chan *smap = netdev_priv(net_dev);
u_int32_t stat, ena;
stat = EMAC3REG_READ(smap, SMAP_EMAC3_INTR_STAT);
ena = EMAC3REG_READ(smap, SMAP_EMAC3_INTR_ENABLE);
/* clear emac3 interrupt */
EMAC3REG_WRITE(smap, SMAP_EMAC3_INTR_STAT, stat);
stat &= (ena|E3_DEAD_ALL);
if (stat & E3_INTR_OVERRUN) { /* this bit does NOT WORKED */
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:emac3 intr: rx overrun\n", net_dev->name);
}
}
if (stat & E3_INTR_PF) {
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:emac3 intr: rx pause frame\n",net_dev->name);
}
}
if (stat & E3_INTR_BAD_FRAME) {
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:emac3 intr: rx bad frame\n", net_dev->name);
}
}
if (stat & E3_INTR_RUNT_FRAME) {
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:emac3 intr: rx runt frame\n", net_dev->name);
}
}
if (stat & E3_INTR_SHORT_EVENT) {
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:emac3 intr: rx short event\n",net_dev->name);
}
}
if (stat & E3_INTR_ALIGN_ERR) {
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:emac3 intr: rx alignment error\n", net_dev->name);
}
}
if (stat & E3_INTR_BAD_FCS) {
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:emac3 intr: rx bad FCS\n", net_dev->name);
}
}
if (stat & E3_INTR_TOO_LONG) {
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:emac3 intr: rx frame too long\n", net_dev->name);
}
}
if (stat & E3_INTR_OUT_RANGE_ERR) {
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:emac3 intr: rx out range error\n", net_dev->name);
}
}
if (stat & E3_INTR_IN_RANGE_ERR) {
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:emac3 intr: rx in range error\n", net_dev->name);
}
}
if (stat & E3_INTR_DEAD_DEPEND) {
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:emac3 intr: tx dead in dependent mode\n", net_dev->name);
}
}
if (stat & E3_INTR_DEAD_0) {
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:emac3 intr: tx dead in channel 0\n", net_dev->name);
}
}
if (stat & E3_INTR_SQE_ERR_0) {
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:emac3 intr: tx sqe test error in channel 0\n", net_dev->name);
}
}
if (stat & E3_INTR_TX_ERR_0) {
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:emac3 intr: tx transmit error in channel 0\n", net_dev->name);
}
}
if (stat & E3_INTR_DEAD_1) {
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:emac3 intr: tx dead in channel 1\n", net_dev->name);
}
}
if (stat & E3_INTR_SQE_ERR_1) {
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:emac3 intr: tx sqe test error in channel 1\n", net_dev->name);
}
}
if (stat & E3_INTR_TX_ERR_1) {
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:emac3 intr: tx transmit error in channel 1\n", net_dev->name);
}
}
if (stat & E3_INTR_MMAOP_FAIL) {
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s:emac3 intr: phy operation failed\n", net_dev->name);
}
}
return;
}
static irqreturn_t smap_interrupt(int irq, void *dev_id)
{
struct net_device *net_dev = (struct net_device *)dev_id;
struct smap_chan *smap = netdev_priv(net_dev);
unsigned long flags;
u_int16_t stat, ena;
spin_lock_irqsave(&smap->spinlock, flags);
stat = SMAPREG16(smap,SMAP_INTR_STAT) & INTR_BITMSK;
ena = SMAPREG16(smap,SMAP_INTR_ENABLE) & INTR_BITMSK;
stat &= ena;
if (stat == 0)
goto end;
if (stat & INTR_TXDNV) {
/* disable TXDNV interrupt */
WRITE_SMAPREG16(smap, SMAP_INTR_ENABLE,
SMAPREG16(smap, SMAP_INTR_ENABLE) & ~INTR_TXDNV);
smap->flags |= SMAP_F_TXDNV_DISABLE;
/* clear interrupt */
WRITE_SMAPREG16(smap, SMAP_INTR_CLR, INTR_TXDNV);
smap->txicnt++;
wake_up_interruptible(&smap->wait_smaprun);
EMAC3REG_WRITE(smap, SMAP_EMAC3_INTR_STAT, E3_DEAD_ALL);
}
if (stat & INTR_RXDNV) {
/* disable RXDNV interrupt */
WRITE_SMAPREG16(smap,SMAP_INTR_ENABLE,
SMAPREG16(smap, SMAP_INTR_ENABLE) & ~INTR_RXDNV);
smap->flags |= SMAP_F_RXDNV_DISABLE;
/* clear interrupt */
WRITE_SMAPREG16(smap, SMAP_INTR_CLR, INTR_RXDNV);
if (smap->flags & SMAP_F_PRINT_MSG) {
printk("%s: intr: RX desc not valid\n",net_dev->name);
}
smap->rxicnt++;
wake_up_interruptible(&smap->wait_smaprun);
}
if (stat & INTR_TXEND) {
WRITE_SMAPREG16(smap, SMAP_INTR_CLR, INTR_TXEND);
/* workaround for race condition of TxEND/RxEND */
if (SMAPREG8(smap,SMAP_RXFIFO_FRAME_CNT) > 0) {
smap->rxicnt++;
}
smap->txicnt++;
wake_up_interruptible(&smap->wait_smaprun);
}
if (stat & INTR_RXEND) {
WRITE_SMAPREG16(smap, SMAP_INTR_CLR, INTR_RXEND);
/* workaround for race condition of TxEND/RxEND */
if ((smap->txbdusedcnt > 0) &&
(smap->txbdusedcnt > SMAPREG8(smap,SMAP_TXFIFO_FRAME_CNT))
) {
smap->txicnt++;
}
smap->rxicnt++;
wake_up_interruptible(&smap->wait_smaprun);
}
if (stat & INTR_EMAC3) {
smap_emac3_intr(net_dev);
}
end:
spin_unlock_irqrestore(&smap->spinlock, flags);
return IRQ_HANDLED;
}
/*--------------------------------------------------------------------------*/
#define POLY32 0x04C11DB7
static u_int8_t
smap_bitrev(u_int8_t val)
{
int i;
u_int8_t ret = 0;
for (i = 0; i < 8; i++) {
ret <<= 1;
ret |= (val & 0x01) ? 1 : 0;
val >>= 1;
}
return(ret);
}
static u_int32_t
smap_crc32(u_int32_t crcval, u_int8_t cval)
{
int i;
crcval ^= cval << 24;
for (i = 0; i < 8; i++) {
crcval = crcval & 0x80000000 ? (crcval << 1) ^ POLY32 : crcval << 1;
}
return(crcval);
}
static u_int32_t
smap_calc_crc32(struct smap_chan *smap, u_int8_t *addr)
{
int i;
u_int32_t crc;
crc = 0xFFFFFFFF;
for (i = 0; i < ETH_ALEN; i++)
crc = smap_crc32(crc, smap_bitrev(*addr++));
return(crc ^ 0xFFFFFFFF);
}
static int
smap_store_new_mc_list(struct smap_chan *smap)
{
struct net_device *net_dev = smap->net_dev;
struct netdev_hw_addr *ha;
int idx, reg, bit, sethtbl = 0;
u_int32_t val[4];
/* clear HW gourp list */
EMAC3REG_WRITE(smap, SMAP_EMAC3_GROUP_HASH1, 0x0);
EMAC3REG_WRITE(smap, SMAP_EMAC3_GROUP_HASH2, 0x0);
EMAC3REG_WRITE(smap, SMAP_EMAC3_GROUP_HASH3, 0x0);
EMAC3REG_WRITE(smap, SMAP_EMAC3_GROUP_HASH4, 0x0);
val[0] = val[1] = val[2] = val[3] = 0;
netdev_for_each_mc_addr(ha, net_dev) {
/* set new HW group list */
if ((ha->addr[0]&0x1) == 0)
continue;
#if 0 // TBD: Check what is needed here.
if (ha->type != NETDEV_HW_ADDR_T_MULTICAST)
continue;
#endif
idx = smap_calc_crc32(smap, ha->addr);
idx = (idx >> 26) & 0x3f;
reg = idx/16;
bit = 15 - (idx%16);
val[reg] |= (1 << bit);
sethtbl = 1;
}
if (sethtbl) {
/* set HW group list */
EMAC3REG_WRITE(smap, SMAP_EMAC3_GROUP_HASH1, val[0]);
EMAC3REG_WRITE(smap, SMAP_EMAC3_GROUP_HASH2, val[1]);
EMAC3REG_WRITE(smap, SMAP_EMAC3_GROUP_HASH3, val[2]);
EMAC3REG_WRITE(smap, SMAP_EMAC3_GROUP_HASH4, val[3]);
}
return(sethtbl);
}
static void
smap_multicast_list(struct net_device *net_dev)
{
struct smap_chan *smap = netdev_priv(net_dev);
u_int32_t e3v;
/* stop tx/rx */
smap_txrx_XXable(smap, DISABLE);