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[NFC] clang-format the code base
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@gchatelet
gchatelet committed Sep 25, 2023
1 parent ec7d390 commit 8cfb520
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Showing 11 changed files with 101 additions and 97 deletions.
7 changes: 4 additions & 3 deletions include/cpuinfo_loongarch.h
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Expand Up @@ -26,7 +26,7 @@ CPU_FEATURES_START_CPP_NAMESPACE

typedef struct {
// Base
int CPUCFG : 1; // Instruction for Identify CPU Features
int CPUCFG : 1; // Instruction for Identify CPU Features

// Extension
int LAM : 1; // Extension for Atomic Memory Access Instructions
Expand All @@ -36,7 +36,8 @@ typedef struct {
int LASX : 1; // Extension for Loongson Advanced SIMD eXtension
int CRC32 : 1; // Extension for Cyclic Redundancy Check Instructions
int COMPLEX : 1; // Extension for Complex Vector Operation Instructions
int CRYPTO : 1; // Extension for Encryption And Decryption Vector Instructions
int CRYPTO : 1; // Extension for Encryption And Decryption Vector
// Instructions
int LVZ : 1; // Extension for Virtualization
int LBT_X86 : 1; // Extension for X86 Binary Translation Extension
int LBT_ARM : 1; // Extension for ARM Binary Translation Extension
Expand Down Expand Up @@ -69,7 +70,7 @@ typedef enum {

LoongArchInfo GetLoongArchInfo(void);
int GetLoongArchFeaturesEnumValue(const LoongArchFeatures* features,
LoongArchFeaturesEnum value);
LoongArchFeaturesEnum value);
const char* GetLoongArchFeaturesEnumName(LoongArchFeaturesEnum);

CPU_FEATURES_END_CPP_NAMESPACE
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28 changes: 14 additions & 14 deletions include/cpuinfo_mips.h
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Expand Up @@ -21,20 +21,20 @@
CPU_FEATURES_START_CPP_NAMESPACE

typedef struct {
int msa : 1; // MIPS SIMD Architecture
// https://www.mips.com/products/architectures/ase/simd/
int eva : 1; // Enhanced Virtual Addressing
// https://www.mips.com/products/architectures/mips64/
int r6 : 1; // True if is release 6 of the processor.
int mips16 : 1; // Compressed instructions
int mdmx : 1; // MIPS Digital Media Extension
int mips3d : 1; // 3D graphics acceleration
// MIPS(r) Architecture for Programmers, Volume IV-c
int smart : 1; // Smart-card cryptography
// MIPS(r) Architecture for Programmers, Volume IV-d
int dsp : 1; // Digital Signal Processing
// MIPS(r) Architecture for Programmers, Volume IV-e
// https://www.mips.com/products/architectures/ase/dsp/
int msa : 1; // MIPS SIMD Architecture
// https://www.mips.com/products/architectures/ase/simd/
int eva : 1; // Enhanced Virtual Addressing
// https://www.mips.com/products/architectures/mips64/
int r6 : 1; // True if is release 6 of the processor.
int mips16 : 1; // Compressed instructions
int mdmx : 1; // MIPS Digital Media Extension
int mips3d : 1; // 3D graphics acceleration
// MIPS(r) Architecture for Programmers, Volume IV-c
int smart : 1; // Smart-card cryptography
// MIPS(r) Architecture for Programmers, Volume IV-d
int dsp : 1; // Digital Signal Processing
// MIPS(r) Architecture for Programmers, Volume IV-e
// https://www.mips.com/products/architectures/ase/dsp/

// Make sure to update MipsFeaturesEnum below if you add a field here.
} MipsFeatures;
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53 changes: 27 additions & 26 deletions include/cpuinfo_s390x.h
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Expand Up @@ -21,29 +21,29 @@
CPU_FEATURES_START_CPP_NAMESPACE

typedef struct {
int esan3: 1; // instructions named N3, "backported" to esa-mode
int zarch: 1; // z/Architecture mode active
int stfle: 1; // store-facility-list-extended
int msa: 1; // message-security assist
int ldisp: 1; // long-displacement
int eimm: 1; // extended-immediate
int dfp: 1; // decimal floating point & perform floating point operation
int edat: 1; // huge page support
int etf3eh: 1; // extended-translation facility 3 enhancement
int highgprs: 1; // 64-bit register support for 31-bit processes
int te: 1; // transactional execution
int vx: 1; // vector extension facility
int vxd: 1; // vector-packed-decimal facility
int vxe: 1; // vector-enhancement facility 1
int gs: 1; // guarded-storage facility
int vxe2: 1; // vector-enhancements facility 2
int vxp: 1; // vector-packed-decimal-enhancement facility
int sort: 1; // enhanced-sort facility
int dflt: 1; // deflate-conversion facility
int vxp2: 1; // vector-packed-decimal-enhancement facility 2
int nnpa: 1; // neural network processing assist facility
int pcimio: 1; // PCI mio facility
int sie: 1; // virtualization support
int esan3 : 1; // instructions named N3, "backported" to esa-mode
int zarch : 1; // z/Architecture mode active
int stfle : 1; // store-facility-list-extended
int msa : 1; // message-security assist
int ldisp : 1; // long-displacement
int eimm : 1; // extended-immediate
int dfp : 1; // decimal floating point & perform floating point operation
int edat : 1; // huge page support
int etf3eh : 1; // extended-translation facility 3 enhancement
int highgprs : 1; // 64-bit register support for 31-bit processes
int te : 1; // transactional execution
int vx : 1; // vector extension facility
int vxd : 1; // vector-packed-decimal facility
int vxe : 1; // vector-enhancement facility 1
int gs : 1; // guarded-storage facility
int vxe2 : 1; // vector-enhancements facility 2
int vxp : 1; // vector-packed-decimal-enhancement facility
int sort : 1; // enhanced-sort facility
int dflt : 1; // deflate-conversion facility
int vxp2 : 1; // vector-packed-decimal-enhancement facility 2
int nnpa : 1; // neural network processing assist facility
int pcimio : 1; // PCI mio facility
int sie : 1; // virtualization support

// Make sure to update S390XFeaturesEnum below if you add a field here.
} S390XFeatures;
Expand All @@ -55,11 +55,11 @@ typedef struct {
S390XInfo GetS390XInfo(void);

typedef struct {
char platform[64]; // 0 terminated string
char platform[64]; // 0 terminated string
} S390XPlatformTypeStrings;

typedef struct {
int num_processors; // -1 if N/A
int num_processors; // -1 if N/A
S390XPlatformTypeStrings type;
} S390XPlatformStrings;

Expand Down Expand Up @@ -95,7 +95,8 @@ typedef enum {
S390X_LAST_,
} S390XFeaturesEnum;

int GetS390XFeaturesEnumValue(const S390XFeatures* features, S390XFeaturesEnum value);
int GetS390XFeaturesEnumValue(const S390XFeatures* features,
S390XFeaturesEnum value);

const char* GetS390XFeaturesEnumName(S390XFeaturesEnum);

Expand Down
4 changes: 2 additions & 2 deletions include/cpuinfo_x86.h
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Original file line number Diff line number Diff line change
Expand Up @@ -109,8 +109,8 @@ typedef struct {
int fs_rep_stosb : 1; // Fast short REP STOSB
int fs_rep_cmpsb_scasb : 1; // Fast short REP CMPSB/SCASB

int lam: 1; // Intel Linear Address Mask
int uai: 1; // AMD Upper Address Ignore
int lam : 1; // Intel Linear Address Mask
int uai : 1; // AMD Upper Address Ignore
// Make sure to update X86FeaturesEnum below if you add a field here.
} X86Features;

Expand Down
3 changes: 2 additions & 1 deletion src/impl_aarch64_macos_or_iphone.c
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Original file line number Diff line number Diff line change
Expand Up @@ -60,7 +60,8 @@ Aarch64Info GetAarch64Info(void) {
info.features.crc32 = GetDarwinSysCtlByName("hw.optional.armv8_crc32");
info.features.atomics = GetDarwinSysCtlByName("hw.optional.arm.FEAT_LSE");
info.features.fphp = GetDarwinSysCtlByName("hw.optional.arm.FEAT_FP16");
info.features.asimdhp = GetDarwinSysCtlByName("hw.optional.arm.AdvSIMD_HPFPCvt");
info.features.asimdhp =
GetDarwinSysCtlByName("hw.optional.arm.AdvSIMD_HPFPCvt");
info.features.asimdrdm = GetDarwinSysCtlByName("hw.optional.arm.FEAT_RDM");
info.features.jscvt = GetDarwinSysCtlByName("hw.optional.arm.FEAT_JSCVT");
info.features.fcma = GetDarwinSysCtlByName("hw.optional.arm.FEAT_FCMA");
Expand Down
1 change: 0 additions & 1 deletion src/impl_aarch64_windows.c
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Original file line number Diff line number Diff line change
Expand Up @@ -124,7 +124,6 @@ Aarch64Info GetAarch64Info(void) {
info.features.atomics = GetWindowsIsProcessorFeaturePresent(
PF_ARM_V81_ATOMIC_INSTRUCTIONS_AVAILABLE);


bool is_crypto_available = GetWindowsIsProcessorFeaturePresent(
PF_ARM_V8_CRYPTO_INSTRUCTIONS_AVAILABLE);
info.features.aes = is_crypto_available;
Expand Down
29 changes: 15 additions & 14 deletions src/impl_loongarch_linux.c
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Original file line number Diff line number Diff line change
Expand Up @@ -22,19 +22,19 @@
////////////////////////////////////////////////////////////////////////////////
// Definitions for introspection.
////////////////////////////////////////////////////////////////////////////////
#define INTROSPECTION_TABLE \
LINE(LOONGARCH_CPUCFG, CPUCFG, "cfg", HWCAP_LOONGARCH_CPUCFG, 0) \
LINE(LOONGARCH_LAM, LAM, "lam", HWCAP_LOONGARCH_LAM, 0) \
LINE(LOONGARCH_UAL, UAL, "ual", HWCAP_LOONGARCH_UAL, 0) \
LINE(LOONGARCH_FPU, FPU, "fpu", HWCAP_LOONGARCH_FPU, 0) \
LINE(LOONGARCH_LSX, LSX, "lsx", HWCAP_LOONGARCH_LSX, 0) \
LINE(LOONGARCH_LASX, LASX, "lasx", HWCAP_LOONGARCH_LASX, 0) \
LINE(LOONGARCH_CRC32, CRC32, "crc32", HWCAP_LOONGARCH_CRC32, 0) \
LINE(LOONGARCH_COMPLEX, COMPLEX, "complex", HWCAP_LOONGARCH_COMPLEX, 0) \
LINE(LOONGARCH_CRYPTO, CRYPTO, "crypto", HWCAP_LOONGARCH_CRYPTO, 0) \
LINE(LOONGARCH_LVZ, LVZ, "lvz", HWCAP_LOONGARCH_LVZ, 0) \
LINE(LOONGARCH_LBT_X86, LBT_X86, "lbt_x86", HWCAP_LOONGARCH_LBT_X86, 0) \
LINE(LOONGARCH_LBT_ARM, LBT_ARM, "lbt_arm", HWCAP_LOONGARCH_LBT_ARM, 0) \
#define INTROSPECTION_TABLE \
LINE(LOONGARCH_CPUCFG, CPUCFG, "cfg", HWCAP_LOONGARCH_CPUCFG, 0) \
LINE(LOONGARCH_LAM, LAM, "lam", HWCAP_LOONGARCH_LAM, 0) \
LINE(LOONGARCH_UAL, UAL, "ual", HWCAP_LOONGARCH_UAL, 0) \
LINE(LOONGARCH_FPU, FPU, "fpu", HWCAP_LOONGARCH_FPU, 0) \
LINE(LOONGARCH_LSX, LSX, "lsx", HWCAP_LOONGARCH_LSX, 0) \
LINE(LOONGARCH_LASX, LASX, "lasx", HWCAP_LOONGARCH_LASX, 0) \
LINE(LOONGARCH_CRC32, CRC32, "crc32", HWCAP_LOONGARCH_CRC32, 0) \
LINE(LOONGARCH_COMPLEX, COMPLEX, "complex", HWCAP_LOONGARCH_COMPLEX, 0) \
LINE(LOONGARCH_CRYPTO, CRYPTO, "crypto", HWCAP_LOONGARCH_CRYPTO, 0) \
LINE(LOONGARCH_LVZ, LVZ, "lvz", HWCAP_LOONGARCH_LVZ, 0) \
LINE(LOONGARCH_LBT_X86, LBT_X86, "lbt_x86", HWCAP_LOONGARCH_LBT_X86, 0) \
LINE(LOONGARCH_LBT_ARM, LBT_ARM, "lbt_arm", HWCAP_LOONGARCH_LBT_ARM, 0) \
LINE(LOONGARCH_LBT_MIPS, LBT_MIPS, "lbt_mips", HWCAP_LOONGARCH_LBT_MIPS, 0) \
LINE(LOONGARCH_PTW, PTW, "ptw", HWCAP_LOONGARCH_PTW, 0)
#define INTROSPECTION_PREFIX LoongArch
Expand All @@ -53,7 +53,8 @@

static const LoongArchInfo kEmptyLoongArchInfo;

static bool HandleLoongArchLine(const LineResult result, LoongArchInfo* const info) {
static bool HandleLoongArchLine(const LineResult result,
LoongArchInfo* const info) {
StringView line = result.line;
StringView key, value;
if (CpuFeatures_StringView_GetAttributeKeyValue(line, &key, &value)) {
Expand Down
2 changes: 1 addition & 1 deletion src/impl_ppc_linux.c
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Original file line number Diff line number Diff line change
Expand Up @@ -69,7 +69,7 @@
LINE(PPC_SCV, scv, "scv", 0, PPC_FEATURE2_SCV) \
LINE(PPC_HTM_NO_SUSPEND, htm_no_suspend, "htm-no-suspend", 0, \
PPC_FEATURE2_HTM_NO_SUSPEND)
#undef PPC // Remove conflict with compiler generated preprocessor
#undef PPC // Remove conflict with compiler generated preprocessor
#define INTROSPECTION_PREFIX PPC
#define INTROSPECTION_ENUM_PREFIX PPC
#include "define_introspection_and_hwcaps.inl"
Expand Down
51 changes: 26 additions & 25 deletions src/impl_s390x_linux.c
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Original file line number Diff line number Diff line change
Expand Up @@ -22,29 +22,29 @@
////////////////////////////////////////////////////////////////////////////////
// Definitions for introspection.
////////////////////////////////////////////////////////////////////////////////
#define INTROSPECTION_TABLE \
LINE(S390_ESAN3, esan3, "esan3", HWCAP_S390_ESAN3, 0) \
LINE(S390_ZARCH, zarch, "zarch", HWCAP_S390_ZARCH, 0) \
LINE(S390_STFLE, stfle, "stfle", HWCAP_S390_STFLE, 0) \
LINE(S390_MSA, msa, "msa", HWCAP_S390_MSA, 0) \
LINE(S390_LDISP, ldisp, "ldisp", HWCAP_S390_LDISP, 0) \
LINE(S390_EIMM, eimm, "eimm", HWCAP_S390_EIMM, 0) \
LINE(S390_DFP, dfp, "dfp", HWCAP_S390_DFP, 0) \
LINE(S390_EDAT, edat, "edat", HWCAP_S390_HPAGE, 0) \
LINE(S390_ETF3EH, etf3eh, "etf3eh", HWCAP_S390_ETF3EH, 0) \
LINE(S390_HIGHGPRS, highgprs, "highgprs", HWCAP_S390_HIGH_GPRS, 0) \
LINE(S390_TE, te, "te", HWCAP_S390_TE, 0) \
LINE(S390_VX, vx, "vx", HWCAP_S390_VXRS, 0) \
LINE(S390_VXD, vxd, "vxd", HWCAP_S390_VXRS_BCD, 0) \
LINE(S390_VXE, vxe, "vxe", HWCAP_S390_VXRS_EXT, 0) \
LINE(S390_GS, gs, "gs", HWCAP_S390_GS, 0) \
LINE(S390_VXE2, vxe2, "vxe2", HWCAP_S390_VXRS_EXT2, 0) \
LINE(S390_VXP, vxp, "vxp", HWCAP_S390_VXRS_PDE, 0) \
LINE(S390_SORT, sort, "sort", HWCAP_S390_SORT, 0) \
LINE(S390_DFLT, dflt, "dflt", HWCAP_S390_DFLT, 0) \
LINE(S390_VXP2, vxp2, "vxp2", HWCAP_S390_VXRS_PDE2, 0) \
LINE(S390_NNPA, nnpa, "nnpa", HWCAP_S390_NNPA, 0) \
LINE(S390_PCIMIO, pcimio, "pcimio", HWCAP_S390_PCI_MIO, 0) \
#define INTROSPECTION_TABLE \
LINE(S390_ESAN3, esan3, "esan3", HWCAP_S390_ESAN3, 0) \
LINE(S390_ZARCH, zarch, "zarch", HWCAP_S390_ZARCH, 0) \
LINE(S390_STFLE, stfle, "stfle", HWCAP_S390_STFLE, 0) \
LINE(S390_MSA, msa, "msa", HWCAP_S390_MSA, 0) \
LINE(S390_LDISP, ldisp, "ldisp", HWCAP_S390_LDISP, 0) \
LINE(S390_EIMM, eimm, "eimm", HWCAP_S390_EIMM, 0) \
LINE(S390_DFP, dfp, "dfp", HWCAP_S390_DFP, 0) \
LINE(S390_EDAT, edat, "edat", HWCAP_S390_HPAGE, 0) \
LINE(S390_ETF3EH, etf3eh, "etf3eh", HWCAP_S390_ETF3EH, 0) \
LINE(S390_HIGHGPRS, highgprs, "highgprs", HWCAP_S390_HIGH_GPRS, 0) \
LINE(S390_TE, te, "te", HWCAP_S390_TE, 0) \
LINE(S390_VX, vx, "vx", HWCAP_S390_VXRS, 0) \
LINE(S390_VXD, vxd, "vxd", HWCAP_S390_VXRS_BCD, 0) \
LINE(S390_VXE, vxe, "vxe", HWCAP_S390_VXRS_EXT, 0) \
LINE(S390_GS, gs, "gs", HWCAP_S390_GS, 0) \
LINE(S390_VXE2, vxe2, "vxe2", HWCAP_S390_VXRS_EXT2, 0) \
LINE(S390_VXP, vxp, "vxp", HWCAP_S390_VXRS_PDE, 0) \
LINE(S390_SORT, sort, "sort", HWCAP_S390_SORT, 0) \
LINE(S390_DFLT, dflt, "dflt", HWCAP_S390_DFLT, 0) \
LINE(S390_VXP2, vxp2, "vxp2", HWCAP_S390_VXRS_PDE2, 0) \
LINE(S390_NNPA, nnpa, "nnpa", HWCAP_S390_NNPA, 0) \
LINE(S390_PCIMIO, pcimio, "pcimio", HWCAP_S390_PCI_MIO, 0) \
LINE(S390_SIE, sie, "sie", HWCAP_S390_SIE, 0)
#define INTROSPECTION_PREFIX S390X
#define INTROSPECTION_ENUM_PREFIX S390X
Expand All @@ -63,12 +63,13 @@
#include "internal/string_view.h"

static bool HandleS390XLine(const LineResult result,
S390XPlatformStrings* const strings) {
S390XPlatformStrings* const strings) {
StringView line = result.line;
StringView key, value;
if (CpuFeatures_StringView_GetAttributeKeyValue(line, &key, &value)) {
if (CpuFeatures_StringView_IsEquals(key, str("# processors"))) {
strings->num_processors = CpuFeatures_StringView_ParsePositiveNumber(value);
strings->num_processors =
CpuFeatures_StringView_ParsePositiveNumber(value);
}
}
return !result.eof;
Expand Down
4 changes: 2 additions & 2 deletions src/impl_x86_windows.c
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Original file line number Diff line number Diff line change
Expand Up @@ -50,8 +50,8 @@ static void DetectFeaturesFromOs(X86Info* info, X86Features* features) {
features->sse4_2 =
GetWindowsIsProcessorFeaturePresent(PF_SSE4_2_INSTRUCTIONS_AVAILABLE);

// do not bother checking PF_AVX*
// cause AVX enabled processor will have XCR0 be exposed and this function will be skipped at all
// Do not bother checking PF_AVX* : AVX enabled processor will have their XCR0
// register exposed and this function will be skipped altogether.
}

#endif // CPU_FEATURES_OS_WINDOWS
Expand Down
16 changes: 8 additions & 8 deletions src/utils/list_cpu_features.c
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Original file line number Diff line number Diff line change
Expand Up @@ -212,14 +212,14 @@ DEFINE_ADD_FLAGS(GetMipsFeaturesEnumValue, GetMipsFeaturesEnumName,
DEFINE_ADD_FLAGS(GetPPCFeaturesEnumValue, GetPPCFeaturesEnumName, PPCFeatures,
PPC_LAST_)
#elif defined(CPU_FEATURES_ARCH_S390X)
DEFINE_ADD_FLAGS(GetS390XFeaturesEnumValue, GetS390XFeaturesEnumName, S390XFeatures,
S390X_LAST_)
DEFINE_ADD_FLAGS(GetS390XFeaturesEnumValue, GetS390XFeaturesEnumName,
S390XFeatures, S390X_LAST_)
#elif defined(CPU_FEATURES_ARCH_RISCV)
DEFINE_ADD_FLAGS(GetRiscvFeaturesEnumValue, GetRiscvFeaturesEnumName, RiscvFeatures,
RISCV_LAST_)
DEFINE_ADD_FLAGS(GetRiscvFeaturesEnumValue, GetRiscvFeaturesEnumName,
RiscvFeatures, RISCV_LAST_)
#elif defined(CPU_FEATURES_ARCH_LOONGARCH)
DEFINE_ADD_FLAGS(GetLoongArchFeaturesEnumValue, GetLoongArchFeaturesEnumName, LoongArchFeatures,
LOONGARCH_LAST_)
DEFINE_ADD_FLAGS(GetLoongArchFeaturesEnumValue, GetLoongArchFeaturesEnumName,
LoongArchFeatures, LOONGARCH_LAST_)
#endif

// Prints a json string with characters escaping.
Expand Down Expand Up @@ -436,11 +436,11 @@ static Node* CreateTree(void) {
AddMapEntry(root, "arch", CreateString("risc-v"));
AddMapEntry(root, "vendor", CreateString(info.vendor));
AddMapEntry(root, "microarchitecture", CreateString(info.uarch));
AddFlags(root, &info.features);
AddFlags(root, &info.features);
#elif defined(CPU_FEATURES_ARCH_LOONGARCH)
const LoongArchInfo info = GetLoongArchInfo();
AddMapEntry(root, "arch", CreateString("loongarch"));
AddFlags(root, &info.features);
AddFlags(root, &info.features);
#endif
return root;
}
Expand Down

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