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Merge pull request #11 from mossmann/dev-r1.3.0
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r1.3.0
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mossmann authored Oct 24, 2023
2 parents 4a0f97f + a468b4e commit b4fc924
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Showing 25 changed files with 164,593 additions and 158,986 deletions.
6,194 changes: 669 additions & 5,525 deletions aux_port.kicad_sch

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2,190 changes: 1,254 additions & 936 deletions clock_pmod.kicad_sch → bank0_1.kicad_sch

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3,201 changes: 3,201 additions & 0 deletions bank2_3.kicad_sch

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2,546 changes: 1,384 additions & 1,162 deletions ram_section.kicad_sch → bank6_7.kicad_sch

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3,119 changes: 3,119 additions & 0 deletions bank8_configuration.kicad_sch

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1,239 changes: 1,239 additions & 0 deletions clock_misc.kicad_sch

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5,171 changes: 1,144 additions & 4,027 deletions control_port.kicad_sch

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257,646 changes: 131,974 additions & 125,672 deletions cynthion.kicad_pcb

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161 changes: 140 additions & 21 deletions cynthion.kicad_pro
Original file line number Diff line number Diff line change
@@ -1,5 +1,6 @@
{
"board": {
"3dviewports": [],
"design_settings": {
"defaults": {
"board_outline_line_width": 0.15,
Expand Down Expand Up @@ -45,7 +46,7 @@
"silk_text_upright": false,
"zones": {
"45_degree_only": false,
"min_clearance": 0.254
"min_clearance": 0.2032
}
},
"diff_pair_dimensions": [
Expand All @@ -56,8 +57,10 @@
}
],
"drc_exclusions": [
"courtyards_overlap|107939574|69250001|00000000-0000-0000-0000-00005ff50a4b|97020680-52fd-41ee-a656-0dc60c3ba581",
"courtyards_overlap|157939574|69250001|00000000-0000-0000-0000-00005ff4fe57|ebc18994-eb08-4733-b42c-324e62b55257"
"courtyards_overlap|107972313|69250001|00000000-0000-0000-0000-00005ff50a4b|97020680-52fd-41ee-a656-0dc60c3ba581",
"courtyards_overlap|115380001|85380001|00000000-0000-0000-0000-00005fed7822|7b2d556a-2043-41fe-8056-a8543e5d5cfd",
"courtyards_overlap|149225001|83400001|00000000-0000-0000-0000-00005fe26531|fa7984aa-864b-40a5-ad67-90b400a2f166",
"courtyards_overlap|157972313|69250001|00000000-0000-0000-0000-00005ff4fe57|ebc18994-eb08-4733-b42c-324e62b55257"
],
"meta": {
"filename": "board_design_settings.json",
Expand All @@ -66,20 +69,26 @@
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"connection_width": "warning",
"copper_edge_clearance": "error",
"copper_sliver": "warning",
"courtyards_overlap": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint": "error",
"footprint_type_mismatch": "error",
"hole_clearance": "error",
"hole_near_hole": "error",
"invalid_outline": "error",
"isolated_copper": "warning",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"lib_footprint_issues": "warning",
"lib_footprint_mismatch": "warning",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"missing_courtyard": "ignore",
Expand All @@ -89,9 +98,14 @@
"padstack": "error",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_edge_clearance": "warning",
"silk_over_copper": "warning",
"silk_overlap": "ignore",
"skew_out_of_range": "error",
"solder_mask_bridge": "error",
"starved_thermal": "error",
"text_height": "warning",
"text_thickness": "warning",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
Expand All @@ -100,7 +114,6 @@
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"zone_has_empty_net": "error",
"zones_intersect": "error"
},
"rule_severitieslegacy_courtyards_overlap": true,
Expand All @@ -110,22 +123,66 @@
"allow_microvias": false,
"max_error": 0.005,
"min_clearance": 0.127,
"min_copper_edge_clearance": 0.075,
"min_connection": 0.0,
"min_copper_edge_clearance": 0.19999999999999998,
"min_hole_clearance": 0.24,
"min_hole_to_hole": 0.254,
"min_microvia_diameter": 0.19999999999999998,
"min_microvia_drill": 0.09999999999999999,
"min_resolved_spokes": 2,
"min_silk_clearance": 0.0,
"min_text_height": 0.65,
"min_text_thickness": 0.08,
"min_through_hole_diameter": 0.15,
"min_track_width": 0.127,
"min_via_annular_width": 0.125,
"min_via_diameter": 0.41,
"solder_mask_to_copper_clearance": 0.0,
"use_height_for_length_calcs": true
},
"teardrop_options": [
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 5,
"td_on_pad_in_zone": false,
"td_onpadsmd": true,
"td_onroundshapesonly": false,
"td_ontrackend": false,
"td_onviapad": true
}
],
"teardrop_parameters": [
{
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_target_name": "td_round_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_target_name": "td_rect_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_target_name": "td_track_end",
"td_width_to_size_filter_ratio": 0.9
}
],
"track_widths": [
0.0,
0.127,
0.146,
0.1524,
0.2032,
0.3048,
Expand Down Expand Up @@ -158,14 +215,22 @@
"zones_allow_external_fillets": false,
"zones_use_no_outline": true
},
"layer_presets": []
"layer_presets": [],
"viewports": []
},
"boards": [],
"cvpcb": {
"equivalence_files": []
},
"erc": {
"erc_exclusions": [],
"erc_exclusions": [
"pin_to_pin|1739900|1003300|5610ec9c-f62c-49f9-80c2-a63776d16395|5610ec9c-f62c-49f9-80c2-a63776d16395|/fb621148-8145-4217-9712-738e1b5a4823/00000000-0000-0000-0000-00005dcd9772/86be2f0e-7bb1-42d8-87bc-4230c6dbd013|/fb621148-8145-4217-9712-738e1b5a4823/00000000-0000-0000-0000-00005dcd9772/86be2f0e-7bb1-42d8-87bc-4230c6dbd013|/fb621148-8145-4217-9712-738e1b5a4823/00000000-0000-0000-0000-00005dd754d4/6ef06f1e-62a2-438c-8ab4-363586d03e74",
"pin_to_pin|1739900|1003300|5610ec9c-f62c-49f9-80c2-a63776d16395|5610ec9c-f62c-49f9-80c2-a63776d16395|/fb621148-8145-4217-9712-738e1b5a4823/00000000-0000-0000-0000-00005dddb747/6fe66c21-f87e-45b5-9c98-390633af1111|/fb621148-8145-4217-9712-738e1b5a4823/00000000-0000-0000-0000-00005dddb747/6fe66c21-f87e-45b5-9c98-390633af1111|/fb621148-8145-4217-9712-738e1b5a4823/00000000-0000-0000-0000-00005dcd9772/86be2f0e-7bb1-42d8-87bc-4230c6dbd013",
"pin_to_pin|1739900|1003300|5610ec9c-f62c-49f9-80c2-a63776d16395|5610ec9c-f62c-49f9-80c2-a63776d16395|/fb621148-8145-4217-9712-738e1b5a4823/00000000-0000-0000-0000-00005dddb747/6fe66c21-f87e-45b5-9c98-390633af1111|/fb621148-8145-4217-9712-738e1b5a4823/00000000-0000-0000-0000-00005dddb747/6fe66c21-f87e-45b5-9c98-390633af1111|/fb621148-8145-4217-9712-738e1b5a4823/00000000-0000-0000-0000-00005dd754d4/6ef06f1e-62a2-438c-8ab4-363586d03e74",
"pin_to_pin|558800|965200|4f4b30da-2381-4c1f-a83f-53ec32505617|5610ec9c-f62c-49f9-80c2-a63776d16395|/fb621148-8145-4217-9712-738e1b5a4823/00000000-0000-0000-0000-00005da7baf4|/fb621148-8145-4217-9712-738e1b5a4823/00000000-0000-0000-0000-00005da7baf4|/fb621148-8145-4217-9712-738e1b5a4823/00000000-0000-0000-0000-00005dcd9772/86be2f0e-7bb1-42d8-87bc-4230c6dbd013",
"pin_to_pin|558800|965200|4f4b30da-2381-4c1f-a83f-53ec32505617|5610ec9c-f62c-49f9-80c2-a63776d16395|/fb621148-8145-4217-9712-738e1b5a4823/00000000-0000-0000-0000-00005da7baf4|/fb621148-8145-4217-9712-738e1b5a4823/00000000-0000-0000-0000-00005da7baf4|/fb621148-8145-4217-9712-738e1b5a4823/00000000-0000-0000-0000-00005dd754d4/6ef06f1e-62a2-438c-8ab4-363586d03e74",
"pin_to_pin|558800|965200|4f4b30da-2381-4c1f-a83f-53ec32505617|5610ec9c-f62c-49f9-80c2-a63776d16395|/fb621148-8145-4217-9712-738e1b5a4823/00000000-0000-0000-0000-00005da7baf4|/fb621148-8145-4217-9712-738e1b5a4823/00000000-0000-0000-0000-00005da7baf4|/fb621148-8145-4217-9712-738e1b5a4823/00000000-0000-0000-0000-00005dddb747/6fe66c21-f87e-45b5-9c98-390633af1111"
],
"meta": {
"version": 0
},
Expand Down Expand Up @@ -342,18 +407,23 @@
"rule_severities": {
"bus_definition_conflict": "error",
"bus_entry_needed": "error",
"bus_label_syntax": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"conflicting_netclasses": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"endpoint_off_grid": "warning",
"extra_units": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"missing_bidi_pin": "warning",
"missing_input_pin": "warning",
"missing_power_pin": "error",
"missing_unit": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
Expand All @@ -363,6 +433,7 @@
"pin_to_pin": "error",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"simulation_model_issue": "ignore",
"unannotated": "error",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
Expand All @@ -380,11 +451,11 @@
"net_settings": {
"classes": [
{
"bus_width": 12.0,
"bus_width": 12,
"clearance": 0.127,
"diff_pair_gap": 0.127,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.146,
"diff_pair_width": 0.127,
"line_style": 0,
"microvia_diameter": 0.3048,
"microvia_drill": 0.1016,
Expand All @@ -394,13 +465,15 @@
"track_width": 0.127,
"via_diameter": 0.4572,
"via_drill": 0.2032,
"wire_width": 6.0
"wire_width": 6
}
],
"meta": {
"version": 2
"version": 3
},
"net_colors": null
"net_colors": null,
"netclass_assignments": null,
"netclass_patterns": []
},
"pcbnew": {
"last_paths": {
Expand All @@ -416,6 +489,8 @@
"schematic": {
"annotate_start_num": 0,
"drawing": {
"dashed_lines_dash_length_ratio": 12.0,
"dashed_lines_gap_length_ratio": 3.0,
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"field_names": [],
Expand Down Expand Up @@ -447,7 +522,11 @@
"page_layout_descr_file": "",
"plot_directory": "",
"spice_adjust_passive_values": false,
"spice_current_sheet_as_root": false,
"spice_external_command": "spice \"%I\"",
"spice_model_current_sheet_as_root": true,
"spice_save_all_currents": false,
"spice_save_all_voltages": false,
"subpart_first_id": 65,
"subpart_id_separator": 0
},
Expand All @@ -457,8 +536,8 @@
""
],
[
"00000000-0000-0000-0000-00005df88884",
"Clock and Pmod"
"88637316-1688-4ac4-b530-3f2433cec3c1",
"FPGA Banks 2 and 3"
],
[
"00000000-0000-0000-0000-00005dd754d4",
Expand All @@ -470,15 +549,15 @@
],
[
"00000000-0000-0000-0000-00005dcaa6d2",
"Debugger and FPGA Configuration"
"Debugger"
],
[
"00000000-0000-0000-0000-00005dcd9772",
"CONTROL Port"
],
[
"00000000-0000-0000-0000-00005def5588",
"LEDs and Pmod"
"398ed715-d319-4823-8f52-c02f43302105",
"FPGA Banks 6 and 7"
],
[
"00000000-0000-0000-0000-00005da7baf4",
Expand All @@ -491,10 +570,50 @@
[
"490fda6e-4eae-4b35-a875-405b51914829",
"Power Distribution and Monitoring"
],
[
"6ef06f1e-62a2-438c-8ab4-363586d03e74",
"AUX PHY"
],
[
"86be2f0e-7bb1-42d8-87bc-4230c6dbd013",
"CONTROL PHY"
],
[
"6fe66c21-f87e-45b5-9c98-390633af1111",
"TARGET PHY"
],
[
"92d64a9f-2dc8-401c-9690-4ead9b9ce144",
"TARGET Type C Controller"
],
[
"821a7ccd-e154-4207-89e2-0af03a062d97",
"AUX Type C Controller"
],
[
"90959d77-de16-430a-a341-d55720164855",
"Expansion Interfaces"
],
[
"c0a1b8fd-bfd5-4925-b24e-24a40b8a6b17",
"LEDs and Buttons"
],
[
"d6473fd6-7fca-4f4e-a434-76243f5aa389",
"FPGA Banks 0 and 1"
],
[
"f93ff067-5e9f-4565-b018-6e1ef186681c",
"FPGA Bank 8 and Configuration Flash"
],
[
"07741d92-cb3b-401f-9c7e-29f688af7269",
"Clock and Miscellaneous"
]
],
"text_variables": {
"DATE": "2023-07-20",
"VERSION": "1.2.0"
"DATE": "2023-09-28",
"VERSION": "1.3.0"
}
}
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