Require LLVM >= 16.0 (#8003)

* Require LLVM >= 16.0 Per policy, we only support top-of-tree LLVM, plus two versions back; let's update to require LLVM >= 16, and drop workarounds for older versions. * LLVM_VERSION < 170
halide · Jan 17, 2024 · 3a77204 · 3a77204
1 parent d2eed57
commit 3a77204
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Showing 9 changed files with 9 additions and 57 deletions.
diff --git a/dependencies/llvm/CMakeLists.txt b/dependencies/llvm/CMakeLists.txt
@@ -20,7 +20,7 @@ message(STATUS "Found LLVM ${LLVM_PACKAGE_VERSION}")
 message(STATUS "Using LLVMConfig.cmake in: ${LLVM_DIR}")
 message(STATUS "Using ClangConfig.cmake in: ${Clang_DIR}")
 
-if (LLVM_PACKAGE_VERSION VERSION_LESS 15.0)
+if (LLVM_PACKAGE_VERSION VERSION_LESS 16.0)
  message(FATAL_ERROR "LLVM version must be 15.0 or newer")
 endif ()
 

diff --git a/src/CodeGen_ARM.cpp b/src/CodeGen_ARM.cpp
@@ -1144,10 +1144,8 @@ void CodeGen_ARM::visit(const Store *op) {
  llvm::Type *intrin_llvm_type = llvm_type_of(intrin_type);
 #if LLVM_VERSION >= 170
  const bool is_opaque = true;
-#elif LLVM_VERSION >= 150
- const bool is_opaque = llvm::PointerType::get(intrin_llvm_type, 0)->isOpaque();
 #else
- const bool is_opaque = false;
+ const bool is_opaque = llvm::PointerType::get(intrin_llvm_type, 0)->isOpaque();
 #endif
  if (target.bits == 32) {
  instr << "llvm.arm.neon.vst"

diff --git a/src/CodeGen_LLVM.cpp b/src/CodeGen_LLVM.cpp
@@ -1177,35 +1177,19 @@ void CodeGen_LLVM::optimize_module() {
  if (get_target().os == Target::OS::Linux) {
  sanitizercoverage_options.StackDepth = true;
  }
-#if LLVM_VERSION >= 160
  mpm.addPass(SanitizerCoveragePass(sanitizercoverage_options));
-#else
- mpm.addPass(ModuleSanitizerCoveragePass(sanitizercoverage_options));
-#endif
  });
  }
 
  if (get_target().has_feature(Target::ASAN)) {
-#if LLVM_VERSION >= 150
- // Nothing, ASanGlobalsMetadataAnalysis no longer exists
-#else
- pb.registerPipelineStartEPCallback([&](ModulePassManager &mpm, OptimizationLevel) {
- mpm.addPass(RequireAnalysisPass<ASanGlobalsMetadataAnalysis, llvm::Module>());
- });
-#endif
  pb.registerPipelineStartEPCallback([](ModulePassManager &mpm, OptimizationLevel) {
  AddressSanitizerOptions asan_options; // default values are good...
  asan_options.UseAfterScope = true; // ...except this one
  constexpr bool use_global_gc = false;
  constexpr bool use_odr_indicator = true;
  constexpr auto destructor_kind = AsanDtorKind::Global;
-#if LLVM_VERSION >= 160
  mpm.addPass(AddressSanitizerPass(
  asan_options, use_global_gc, use_odr_indicator, destructor_kind));
-#else
- mpm.addPass(ModuleAddressSanitizerPass(
- asan_options, use_global_gc, use_odr_indicator, destructor_kind));
-#endif
  });
  }
 
@@ -2046,11 +2030,7 @@ void CodeGen_LLVM::add_tbaa_metadata(llvm::Instruction *inst, string buffer, con
 }
 
 void CodeGen_LLVM::function_does_not_access_memory(llvm::Function *fn) {
-#if LLVM_VERSION >= 160
  fn->addFnAttr("memory(none)");
-#else
- fn->addFnAttr(llvm::Attribute::ReadNone);
-#endif
 }
 
 void CodeGen_LLVM::visit(const Load *op) {

diff --git a/src/CodeGen_RISCV.cpp b/src/CodeGen_RISCV.cpp
@@ -174,11 +174,9 @@ string CodeGen_RISCV::mattrs() const {
 
  if (target.has_feature(Target::RVV)) {
  attrs.emplace_back("+v");
-#if LLVM_VERSION >= 160
  if (target.vector_bits != 0) {
  attrs.push_back("+zvl" + std::to_string(target.vector_bits) + "b");
  }
-#endif
  }
  return join_strings(attrs, ",");
 }

diff --git a/src/JITModule.cpp b/src/JITModule.cpp
@@ -225,11 +225,7 @@ JITModule::Symbol compile_and_get_function(llvm::orc::LLJIT &JIT, const string &
  auto addr = JIT.lookup(name);
  internal_assert(addr) << llvm::toString(addr.takeError()) << "\n";
 
-#if LLVM_VERSION >= 150
  void *f = (void *)addr->getValue();
-#else
- void *f = (void *)addr->getAddress();
-#endif
  if (!f) {
  internal_error << "Compiling " << name << " returned nullptr\n";
  }
@@ -1014,20 +1010,12 @@ JITModule &make_module(llvm::Module *for_module, Target target,
  }
 
  uint64_t arg_addr = llvm::cantFail(runtime.jit_module->JIT->lookup("halide_jit_module_argument"))
-#if LLVM_VERSION >= 150
  .getValue();
-#else
- .getAddress();
-#endif
  internal_assert(arg_addr != 0);
  *((void **)arg_addr) = runtime.jit_module.get();
 
  uint64_t fun_addr = llvm::cantFail(runtime.jit_module->JIT->lookup("halide_jit_module_adjust_ref_count"))
-#if LLVM_VERSION >= 150
  .getValue();
-#else
- .getAddress();
-#endif
  internal_assert(fun_addr != 0);
  *(void (**)(void *arg, int32_t count))fun_addr = &adjust_module_ref_count;
  }

diff --git a/src/LLVM_Headers.h b/src/LLVM_Headers.h
@@ -1,10 +1,10 @@
 #ifndef HALIDE_LLVM_HEADERS_H
 #define HALIDE_LLVM_HEADERS_H
 
-#if LLVM_VERSION >= 140
+#if LLVM_VERSION >= 160
 // We're good to go
 #else
-#error "Compiling Halide requires LLVM 14.0 or newer"
+#error "Compiling Halide requires LLVM 16.0 or newer"
 #endif
 
 // No msvc warnings from llvm headers please

diff --git a/src/LLVM_Runtime_Linker.cpp b/src/LLVM_Runtime_Linker.cpp
@@ -402,11 +402,7 @@ llvm::DataLayout get_data_layout_for_target(Target target) {
  if (target.bits == 32) {
  return llvm::DataLayout("e-m:e-p:32:32-i64:64-n32-S128");
  } else {
-#if LLVM_VERSION >= 160
  return llvm::DataLayout("e-m:e-p:64:64-i64:64-i128:128-n32:64-S128");
-#else
- return llvm::DataLayout("e-m:e-p:64:64-i64:64-i128:128-n64-S128");
-#endif
  }
  } else {
  // Return empty data layout. Must be set later.

diff --git a/test/correctness/simd_op_check_arm.cpp b/test/correctness/simd_op_check_arm.cpp
@@ -948,8 +948,7 @@ class SimdOpCheckARM : public SimdOpCheckTest {
  // LLVM15 emits UZP2 if the shift amount is half the width of the vector element.
  const auto shrn_or_uzp2 = [&](int element_width, int shift_amt, int vector_width) {
  constexpr int simd_vector_bits = 128;
- if (Halide::Internal::get_llvm_version() >= 150 &&
- ((vector_width * element_width) % (simd_vector_bits * 2)) == 0 &&
+ if (((vector_width * element_width) % (simd_vector_bits * 2)) == 0 &&
  shift_amt == element_width / 2) {
  return "uzp2";
  }

diff --git a/test/correctness/simd_op_check_wasm.cpp b/test/correctness/simd_op_check_wasm.cpp
@@ -388,17 +388,10 @@ class SimdOpCheckWASM : public SimdOpCheckTest {
  // check("v128.load64_zero", 2 * w, in_u64(0));
 
  // Load vector with identical lanes generates *.splat.
- if (Halide::Internal::get_llvm_version() >= 160) {
- check("i8x16.splat", 16 * w, in_u8(0));
- check("i16x8.splat", 8 * w, in_u16(0));
- check("i32x4.splat", 4 * w, in_u32(0));
- check("i64x2.splat", 2 * w, in_u64(0));
- } else {
- check("v128.load8_splat", 16 * w, in_u8(0));
- check("v128.load16_splat", 8 * w, in_u16(0));
- check("v128.load32_splat", 4 * w, in_u32(0));
- check("v128.load64_splat", 2 * w, in_u64(0));
- }
+ check("i8x16.splat", 16 * w, in_u8(0));
+ check("i16x8.splat", 8 * w, in_u16(0));
+ check("i32x4.splat", 4 * w, in_u32(0));
+ check("i64x2.splat", 2 * w, in_u64(0));
 
  // Load Lane
  // TODO: does Halide have any idiom that obviously generates these?