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Use n32:64 in RISC-V data layout #7175

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merged 2 commits into from
Nov 28, 2022
Merged

Use n32:64 in RISC-V data layout #7175

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b85197d
Use n32:64 in RISC-V data layout
dkurt Nov 22, 2022
7edce9d
Remove unused LLVM header
dkurt Nov 25, 2022
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1 change: 0 additions & 1 deletion src/LLVM_Headers.h
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Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,6 @@
#include <llvm/Analysis/TargetTransformInfo.h>
#include <llvm/Bitcode/BitcodeReader.h>
#include <llvm/Bitcode/BitcodeWriter.h>
#include <llvm/ExecutionEngine/JITEventListener.h>
#include <llvm/ExecutionEngine/Orc/LLJIT.h>
#include <llvm/ExecutionEngine/Orc/ObjectLinkingLayer.h>
#include <llvm/ExecutionEngine/Orc/RTDyldObjectLinkingLayer.h>
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4 changes: 4 additions & 0 deletions src/LLVM_Runtime_Linker.cpp
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Expand Up @@ -364,7 +364,11 @@ llvm::DataLayout get_data_layout_for_target(Target target) {
if (target.bits == 32) {
return llvm::DataLayout("e-m:e-p:32:32-i64:64-n32-S128");
} else {
#if LLVM_VERSION >= 160
return llvm::DataLayout("e-m:e-p:64:64-i64:64-i128:128-n32:64-S128");
#else
return llvm::DataLayout("e-m:e-p:64:64-i64:64-i128:128-n64-S128");
#endif
}
} else {
internal_error << "Bad target arch: " << target.arch << "\n";
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